On Sunday, April 6, 2014 4:47:25 AM UTC-6, Miroslav Rudišin wrote:
It is false, because clock control is on gpio3[21].
Hi Miroslav,
You might want to double check what you are doing here. The clock control
is on gpio1_27 as shown on page 3 of the schematic. Pin V17 is hardwired to
the
Thanks Denis,
you are right.
I've been mixing configuration register offsets and their names. But I've
managed finally to get it right.
It would help if the conf_* registers were predefined in the header and
cape DTS files would use that defines.
Best regards,
Miero
On Monday, April 7, 2014
Hi again,
Just after the posting I've found the source of reported error.
The Angstrom DTS file contains following pinctrl request in the DTS for
HDMI audio.
0x1a8 0x1f /* mcasp0_axr1 GPIO1_27 | OUTPUT | PULLUP */
mcasp_clock_enable = gpio2 27 0; /* BeagleBone Black Clk enable on
GPIO1_27 */
