The hw limitation cause us to add a lot of
tricks into our code. Maybe we need to find
some place to declare details for others
to understand.
The whole patch set is OK for me.
On 四, 2014-06-19 at 15:44 +0800, Zhigang Gong wrote:
> As sample LD message doesn't support array index, we have
> to cr
And mem_base_addr_align' unit is bit, and origin's is byte, correct it when
compare.
Signed-off-by: Yang Rong
---
src/cl_api.c | 10 ++
src/cl_mem.c | 21 ++---
2 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/src/cl_api.c b/src/cl_api.c
index c4a8730..d4d
Should add sub_offset in these functions.
V2: clEnqueueMapBuffer's return ptr should not add sub offset. It will add sub
offset in _cl_map_mem
Signed-off-by: Yang Rong
---
src/cl_enqueue.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/src/cl_enque
And mem_base_addr_align' unit is bit, and origin's is byte, correct it when
compare.
Signed-off-by: Yang Rong
---
src/cl_api.c | 10 ++
src/cl_mem.c | 21 ++---
2 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/src/cl_api.c b/src/cl_api.c
index c4a8730..d4d
Should add sub_offset in these functions.
Signed-off-by: Yang Rong
---
src/cl_enqueue.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/src/cl_enqueue.c b/src/cl_enqueue.c
index ff6ec9e..35123e5 100644
--- a/src/cl_enqueue.c
+++ b/src/cl_enqueue.c
Since some issue in tanpi, decrease the accuracy by 100 times.
Signed-off-by: Yi Sun
diff --git a/utests/utest_math_gen.py b/utests/utest_math_gen.py
index f33d528..30a9b24 100755
--- a/utests/utest_math_gen.py
+++ b/utests/utest_math_gen.py
@@ -565,7 +565,7 @@ static float tanpi(float x){
re
This patch LGTM, pushed, thanks.
On Wed, Jun 18, 2014 at 02:42:07PM +0800, junyan...@inbox.com wrote:
> From: Junyan He
>
> Fix some typo and use macro to simplify the code.
>
> Signed-off-by: Junyan He
> ---
> backend/src/llvm/llvm_printf_parser.cpp | 163
> +---
This patch LGTM, pushed, thanks.
On Wed, Jun 18, 2014 at 02:42:15PM +0800, junyan...@inbox.com wrote:
> From: Junyan He
>
> If multi-thread run the kernel simultaneously, the output
> may interlace with each other. Add a lock to avoid this.
>
> Signed-off-by: Junyan He
> ---
> backend/src/ir/
LGTM, pushed, thanks.
On Thu, Jun 19, 2014 at 02:01:23PM +0800, Ruiling Song wrote:
> 1. use_iterator point to 'Use' now instead of 'User'.
> 2. all c-string are in constant address space now, which follows OCL Spec.
>
> Signed-off-by: Ruiling Song
> ---
> backend/src/llvm/llvm_gen_backend.cpp
LGTM, pushed, thanks.
On Wed, Jun 18, 2014 at 03:09:44PM +0800, Ruiling Song wrote:
> backward compatible with LLVM 3.3
>
> Signed-off-by: Ruiling Song
> ---
> backend/src/backend/gen_program.cpp |6 +-
> backend/src/backend/program.cpp |2 +-
> backend
LGTM, pushed, thanks.
On Wed, Jun 18, 2014 at 03:59:53PM +0800, Ruiling Song wrote:
> Simply use getRegister which deals with various ConstantExpr.
> Thanks to Abrahm Scully who report the bug.
>
> Signed-off-by: Ruiling Song
> ---
> backend/src/llvm/llvm_gen_backend.cpp |4 +---
> 1 file c
LGTM, pushed, thanks.
On Thu, Jun 19, 2014 at 10:37:42PM +0800, Yang Rong wrote:
> If event status is an Error code, the status of events wait on this event
> also should set to Error code.
>
> V2: should not execute the enqueue command wait on the event whose status is
> error.
> Signed-off-by
Pushed with slight change to silence compilation warning.
Thanks for your contribution.
On Wed, Jun 18, 2014 at 10:28:42PM -0400, Abrahm Scully wrote:
> Allows non-root user to run without X.
> Works on Fedora 20 with render nodes enabled.
>
> Signed-off-by: Abrahm Scully
> ---
> src/intel/inte
forgot to change the gen75 bind image function, please ignore this
version. I already sent the v4 for this patch.
On Thu, Jun 19, 2014 at 03:36:36PM +0800, Zhigang Gong wrote:
> As sample LD message doesn't support array index, we have
> to create a 2D array surface with the same buffer object.
>
As sample LD message doesn't support array index, we have
to create a 2D array surface with the same buffer object.
Thus one 1D array image will have two surfaces binded to it
one is the index and the second is 128 + index.
And then at kernel side, we will access the corresponding
2D array surface
According to ocl spec:
Return height of the image in pixels. For a
1D image, 1D image buffer and 1D image
array object, height = 0.
Return depth of the image in pixels. For a
1D image, 1D image buffer, 2D image or
1D and 2D image array object, depth = 0.
Signed-off-by: Zhigang Gong
---
src/cl_
As sample LD message doesn't support array index, we have
to create a 2D array surface with the same buffer object.
Thus one 1D array image will have two surfaces binded to it
one is the index and the second is 128 + index.
And then at kernel side, we will access the corresponding
2D array surface
As we treat 1D array image as a 2d array image with height 1
internally, we need to fixup region and origins passed in
from external APIs.
Signed-off-by: Zhigang Gong
---
src/cl_api.c | 39 ++-
src/cl_utils.h | 29 +
2 files chang
Signed-off-by: Ruiling Song
---
docs/Beignet.mdwn |8
docs/Beignet/Backend.mdwn | 42 --
2 files changed, 48 insertions(+), 2 deletions(-)
diff --git a/docs/Beignet.mdwn b/docs/Beignet.mdwn
index 7870c12..1a56a6f 100644
--- a/docs/Be
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