Forgot to remove the prototype definition in cl_context.h, please help to fix
that before merge.
Thanks.
extern cl_kernel cl_context_get_static_kernel(cl_context ctx, cl_int index,
const char *str_kernel, const char * str_option);
-Original Message-
From: Beignet
This patch fixed two thread-safe bugs in the builtin-kernel
usage code path.
1. The builtin kernel array itself need to be protected.
2. Each caller need to get a dup of the builtin kernel,
rather than share the same kernel structure.
Signed-off-by: Zhigang Gong zhigang.g...@intel.com
---
Also fix a spelling bug - s/internel/internal.
Signed-off-by: Zhigang Gong zhigang.g...@intel.com
---
src/cl_context.c | 73 +---
src/cl_context.h | 2 +-
2 files changed, 12 insertions(+), 63 deletions(-)
diff --git a/src/cl_context.c
+ class SimdShuffleInstructionPattern : public SelectionPattern {
+ public:
+SimdShuffleInstructionPattern(void) : SelectionPattern(1,1) {
+ this-opcodes.push_back(ir::OP_SIMD_SHUFFLE);
+}
+INLINE bool emit(Selection::Opaque sel, SelectionDAG dag) const {
+ using
LGTM, thanks, pushed.
-Original Message-
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
Meng Mengmeng
Sent: Wednesday, July 15, 2015 01:23
To: beignet@lists.freedesktop.org
Cc: Meng, Mengmeng
Subject: [Beignet] [PATCH] correct ULP value in utests
Set a
The second argument of simd_shuffle is integer, which is not the
same as the instruction type. but when we are dealing with
BinaryInstruction in instruction selection, we would call
getFloatValue() to do some imm optimization. We should
implement a separate pattern for simd shuffle. after that,
I
LGTM
-Original Message-
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
Yang Rong
Sent: Wednesday, July 15, 2015 3:28 PM
To: beignet@lists.freedesktop.org
Cc: Yang, Rong R
Subject: [Beignet] [PATCH] BDW: override GenContext::patchBranches.
BDW/CHV/SKL's
LGTM, will push it, thanks.
-Original Message-
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
Ruiling Song
Sent: Wednesday, July 15, 2015 16:47
To: beignet@lists.freedesktop.org
Cc: Song, Ruiling
Subject: [Beignet] [PATCH] GBE/IMM: Temporarily allow
BDW/CHV/SKL's jip and uip have change to 32 bit. Need not check jip and uip
range when patch branches.
Signed-off-by: Yang Rong rong.r.y...@intel.com
---
backend/src/backend/gen8_context.cpp | 18 ++
backend/src/backend/gen8_context.hpp | 2 ++
The patchset LGTM, pushed, thanks.
-Original Message-
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
Zhigang Gong
Sent: Wednesday, July 15, 2015 08:58
To: beignet@lists.freedesktop.org
Cc: Zhigang Gong
Subject: [Beignet] [Patch v2 1/2] Fixed a thread safe
Pushed.
-Original Message-
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
Luo, Xionghu
Sent: Wednesday, July 15, 2015 10:58
To: Gong, Zhigang; beignet@lists.freedesktop.org
Cc: Gong, Zhigang
Subject: Re: [Beignet] [PATCH] runtime: Need to separate atomic
11 matches
Mail list logo