[Beignet] [PATCH] Fix clLinkProgram error.

2015-09-20 Thread Yang Rong
All programs or none programs specified by input_programs contain a compiled binary or library for the device. Otherwise return CL_INVALID_OPERATION. Correct this condition check. Signed-off-by: Yang Rong --- src/cl_api.c | 2 +- src/cl_program.c | 43 --

Re: [Beignet] [PATCH] GBE: avoid vector registers when there is high register pressure.

2015-09-20 Thread Zhigang Gong
On Mon, Sep 21, 2015 at 11:11:48AM +0800, Ruiling Song wrote: > It makes sense to use short-live vector register under register pressure. > But please also remove the comment > "// If an element has very long interval, we don't want to put it into a > // vector as it will add more pressure to the

Re: [Beignet] [PATCH 5/5] GBE: implement further phi mov optimization based on intra-BB interefering analysis.

2015-09-20 Thread Zhigang Gong
On Mon, Sep 21, 2015 at 03:09:12AM +, Song, Ruiling wrote: > > > > But for some cases, many phi copy source registers are also phi copy value > > which has multiple definitions. And they could all be reduced to one phi > > copy > > register if there is no interfering in all BBs. This patch w

Re: [Beignet] [PATCH 3/5] GBE: add two helper routines for liveness partially update.

2015-09-20 Thread Zhigang Gong
On Mon, Sep 21, 2015 at 02:51:26AM +, Song, Ruiling wrote: > > + > > + void Liveness::replaceRegs(const map &replaceMap) > > + { > > + > > +for (auto &pair : liveness) { > > + BlockInfo &info = *pair.second; > > + BasicBlock *bb = const_cast(&info.bb); > > + for (auto &pair

Re: [Beignet] [PATCH] GBE: avoid vector registers when there is high register pressure.

2015-09-20 Thread Ruiling Song
It makes sense to use short-live vector register under register pressure. But please also remove the comment "// If an element has very long interval, we don't want to put it into a // vector as it will add more pressure to the register allocation" Thanks! Ruiling 2015-09-17 8:39 GMT+08:00 Zhigan

Re: [Beignet] [PATCH 5/5] GBE: implement further phi mov optimization based on intra-BB interefering analysis.

2015-09-20 Thread Song, Ruiling
> But for some cases, many phi copy source registers are also phi copy value > which has multiple definitions. And they could all be reduced to one phi copy > register if there is no interfering in all BBs. This patch with the previous > patches > could reduce the whole spilled register from 200

Re: [Beignet] [PATCH 2/5] GBE: refine liveness analysis.

2015-09-20 Thread Song, Ruiling
LGTM. Yes, we current don't use uniform information before instruction selection. So it is OK to disable uniform analysis before insn selection. But in the long term, we need to enhance our Gen IR, such as introduce more optimization, we may add the uniform information again I think.. Thanks! Ru

Re: [Beignet] [PATCH v2 4/5] GBE: add some dag helper routines to check registers' interfering.

2015-09-20 Thread Song, Ruiling
LGTM > -Original Message- > From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of > Zhigang Gong > Sent: Sunday, September 6, 2015 3:04 PM > To: beignet@lists.freedesktop.org > Cc: Gong, Zhigang > Subject: [Beignet] [PATCH v2 4/5] GBE: add some dag helper routines to ch

Re: [Beignet] [PATCH 1/5] GBE: refine Phi copy interfering check.

2015-09-20 Thread Song, Ruiling
Yes, this is a good fix. LGTM. Thanks! Ruiling > -Original Message- > From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of > Zhigang Gong > Sent: Tuesday, September 1, 2015 12:05 PM > To: beignet@lists.freedesktop.org > Cc: Gong, Zhigang > Subject: [Beignet] [PATCH 1/

Re: [Beignet] [PATCH 3/5] GBE: add two helper routines for liveness partially update.

2015-09-20 Thread Song, Ruiling
> + > + void Liveness::replaceRegs(const map &replaceMap) > + { > + > +for (auto &pair : liveness) { > + BlockInfo &info = *pair.second; > + BasicBlock *bb = const_cast(&info.bb); > + for (auto &pair : replaceMap) { > +Register from = pair.first; > +Register to =