Re: [Beignet] [PATCH] GBE: Implement liveness dump.

2015-09-23 Thread Zhigang Gong
LGTM, and you can remove those useless printf code now. On Thu, Sep 24, 2015 at 10:05:07AM +0800, Ruiling Song wrote: > Signed-off-by: Ruiling Song > --- > backend/src/ir/liveness.cpp | 20 > 1 file changed, 20 insertions(+) > > diff --git

Re: [Beignet] [PATCH V2 3/3] add local copy propagation optimization for each basic block

2015-09-23 Thread Zhigang Gong
On Thu, Sep 24, 2015 at 02:58:22AM +, Guo, Yejun wrote: > > > -Original Message- > From: Zhigang Gong [mailto:zhigang.g...@linux.intel.com] > Sent: Thursday, September 24, 2015 9:14 AM > To: Guo, Yejun > Cc: beignet@lists.freedesktop.org > Subject: Re: [Beignet] [PATCH V2 3/3] add

[Beignet] [Patch v2] GBE: Don't try to remove instructions when liveness is in dynamic update phase.

2015-09-23 Thread Zhigang Gong
As we want to avoid liveness update all the time, we maintain the liveness information dynamically during the phi mov optimization. Instruction(self-copy) remving bring unecessary complexity here. Let's avoid do that here, and do the self-copy removing latter in removeMOVs(). v2: forgot to remove

Re: [Beignet] Still getting "Failed to release test userptr object! (9) i915 kernel driver may not be sane!"

2015-09-23 Thread Gerald Baier
Can confirm, the problem also persists for me. I'm also running fedora 22 with kernel 4.1.6 and libdrm 2.4.61. Only difference I use a pretty recent git version 0ff74172ddda4ea43da62b27c23f6933b7acadfa (16. Sept). Cheers, Gerald On 09/18/2015 12:29 PM, Lorenzo Pistone wrote: Hello. Running

[Beignet] Variety of assert failures with packed structs

2015-09-23 Thread Lorenzo Pistone
It seems that packed structs are completely broken in Beignet 1.1.0, Ivy Bridge code gen. The following kernel typedef struct __attribute__((packed)){ float v; } point; __kernel void test(__global point* points){ __global point* p = points + get_global_id(0);

Re: [Beignet] Still getting "Failed to release test userptr object! (9) i915 kernel driver may not be sane!"

2015-09-23 Thread Pan, Xiuli
Hi all, The patch for this bug is now in the master branch http://cgit.freedesktop.org/beignet/commit/?id=f48b4f6766fcaa193652fcbe6ea0bb29f92e45aa , could you try it to see if this can fix the bug on your platform. Thanks Pan Xiuli -Original Message- From: Beignet

Re: [Beignet] [Patch v2] GBE: Don't try to remove instructions when liveness is in dynamic update phase.

2015-09-23 Thread Song, Ruiling
The previous patchset plus this one LGTM. Thanks! Ruiling > -Original Message- > From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of > Zhigang Gong > Sent: Thursday, September 24, 2015 9:15 AM > To: beignet@lists.freedesktop.org > Cc: Gong, Zhigang > Subject:

Re: [Beignet] [PATCH V2 3/3] add local copy propagation optimization for each basic block

2015-09-23 Thread Guo, Yejun
-Original Message- From: Zhigang Gong [mailto:zhigang.g...@linux.intel.com] Sent: Thursday, September 24, 2015 9:14 AM To: Guo, Yejun Cc: beignet@lists.freedesktop.org Subject: Re: [Beignet] [PATCH V2 3/3] add local copy propagation optimization for each basic block > + void

[Beignet] [ocl2.0] runtime: change cl-std to 2.0

2015-09-23 Thread Ruiling Song
note we should set -cl-std when generating pch, or clang will treat it as opencl 1.0. Signed-off-by: Ruiling Song --- backend/src/backend/program.cpp| 6 -- backend/src/libocl/CMakeLists.txt | 4 ++-- backend/src/libocl/tmpl/ocl_defines.tmpl.h |

[Beignet] [ocl2.0] GBE: Refine ir for memory operation like atomic/load/store

2015-09-23 Thread Ruiling Song
the legacyMode means what kind of address mode to choose. when legacyMode is true, we need to do complex bti analysis. dynamicBti and staticBti are most for platforms before BDW. And stateless is for platform BDW+ Signed-off-by: Ruiling Song ---

[Beignet] [PATCH 6/9] GBE: continue to refine interfering check.

2015-09-23 Thread Zhigang Gong
More aggresive interfering check, even if both registers are in Livein set or Liveout set, they are still possible not interfering to each other. v2: Liveout interfering check need to take care those BBs which has only one register defined. For example: BBn: ... MOV %r1, %src ... Both

[Beignet] [PATCH 4/9] GBE: add some dag helper routines to check registers' interfering.

2015-09-23 Thread Zhigang Gong
These helper function will be used in further phi mov optimization. v2: remove the useless debug message code. Signed-off-by: Zhigang Gong --- backend/src/ir/value.cpp | 100 +++ backend/src/ir/value.hpp | 13 ++ 2 files

[Beignet] [PATCH 2/9] GBE: refine liveness analysis.

2015-09-23 Thread Zhigang Gong
Only in gen backend stage, we need to take care of the special extra liveout and uniform analysis. In IR stage, we don't need to handle them. Signed-off-by: Zhigang Gong --- backend/src/backend/context.cpp | 2 +- backend/src/ir/liveness.cpp | 17 ++---

[Beignet] [PATCH 3/9] GBE: add two helper routines for liveness partially update.

2015-09-23 Thread Zhigang Gong
We don't need to recompute the entire liveness information for all cases. This is a preparation patch for further phi copy optimization. v2: also need to update varKill set. Signed-off-by: Zhigang Gong --- backend/src/ir/liveness.cpp | 37

[Beignet] [PATCH 9/9] GBE: avoid vector registers when there is high register pressure.

2015-09-23 Thread Zhigang Gong
If the reservedSpillRegs is not zero, it indicates we are in a very high register pressure. Use register vector will likely increase that pressure and will cause significant performance problem which is much worse than use a short-live temporary vector register with several additional MOVs. So

[Beignet] [PATCH 1/9] GBE: refine Phi copy interfering check.

2015-09-23 Thread Zhigang Gong
If the PHI source register's definition instruction uses the phi register, it is not a interfere. For an example: MOV %phi, %phicopy ... ADD %phiSrcDef, %phi, tmp ... MOV %phicopy, %phiSrcDef ... The %phi and the %phiSrcDef is not interering each other. Simply advancing the start of the check to