Yes, it is supported. You can have a try.
Please take a look at Beignet Wiki page:
http://www.freedesktop.org/wiki/Software/Beignet/
If you still have problem, you can send email to this mail list.
Thanks!
Ruiling
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
Andrés
Contributor: Junyan He
Signed-off-by: Yan Wang
---
backend/src/backend/gen8_context.cpp | 36 +++
backend/src/backend/gen8_context.hpp | 1 +
backend/src/backend/gen_context.cpp | 70
Contributor: Junyan He
Signed-off-by: Yan Wang
---
backend/src/ir/context.hpp| 5 ++
backend/src/llvm/llvm_gen_backend.cpp | 89 ---
2 files changed, 78 insertions(+), 16 deletions(-)
diff --git
Contributor: Junyan He
Signed-off-by: Yan Wang
---
backend/src/ir/printf.cpp | 122 +-
backend/src/ir/printf.hpp | 2 +-
2 files changed, 112 insertions(+), 12 deletions(-)
diff --git
Contributor: Junyan He
Signed-off-by: Yan Wang
---
backend/src/ir/function.hpp| 8 ++
backend/src/ir/instruction.cpp | 57 +-
backend/src/ir/instruction.hpp | 13 ++
All errores are CL_INVALID_BUFFER_SIZE, seems device's global_mem_size or/and
max_mem_alloc_size too small.
These values are calculated from drm_intel_get_aperture_sizes and sysinfo, can
you provide these functions return value in file src/cl_device_id.c and
src/intel/intel_driver.c.
Thanks.
>
Contributor: Junyan He
Signed-off-by: Yan Wang
---
backend/src/backend/program.cpp | 14 --
backend/src/backend/program.hpp | 10 +-
backend/src/gbe_bin_interpreter.cpp | 2 -
backend/src/ir/printf.cpp |
Yes, I agree with you. But at least as I know haswell hardware does not support
double well.
Hi Junyan,
Can we handle it graciously? Do you have any idea?
Thanks!
Ruiling
From: Paulo Dias [mailto:paulo.miguel.d...@gmail.com]
Sent: Wednesday, January 20, 2016 8:37 PM
To: Song, Ruiling
From: Junyan He
Because the workgroup OP has forwarding msg and wait functions,
it needs all the threads to sync with each other. It has very
similar behavior as BARRIER, so we add it into schedule consideration
accordingly.
Signed-off-by: Junyan He
From: Junyan He
sr0 is used to specify the state reigster where we can get the
state of each EU thread.
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
backend/src/backend/gen75_context.cpp | 8 +---
From: Junyan He
We will use SLM to store the value to broadcast and the map
between real hw thread and logical workgroup thread.
These two values give the offset in the SLM.
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
From: Junyan He
We need to build a map between logical workgroup thread and
real hw thread. This curbe will hold the logical workgroup thread
ID when it is executed on some HW thread.
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
backend/src/libocl/src/ocl_work_group.cl | 114 +++
1 file changed, 57 insertions(+), 57 deletions(-)
diff --git
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
backend/src/backend/gen_context.cpp| 3 ++
backend/src/backend/gen_context.hpp| 1 +
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
backend/src/backend/gen_encoder.cpp | 12
backend/src/backend/gen_encoder.hpp | 2 ++
2 files changed, 14 insertions(+)
diff --git
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
src/cl_command_queue_gen7.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/cl_command_queue_gen7.c
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
backend/src/backend/gen_context.cpp | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
backend/src/backend/gen_context.cpp | 277
1 file changed, 277 insertions(+)
diff --git
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
kernels/compiler_workgroup_reduce.cl | 12 +++
utests/compiler_workgroup_reduce.cpp | 69
2 files changed,
From: Junyan He
We need to use forward message to send data and sync
threads within the same work group. The HW lack the
feature to get the TID and EUID of other threads. So
we need to establish a map for this usage.
Signed-off-by: Junyan He
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
backend/src/backend/gen_register.hpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/backend/src/backend/gen_register.hpp
From: Junyan He
Signed-off-by: Junyan He
Reviewed-by: Yang Rong
---
kernels/compiler_workgroup_reduce.cl | 28 ++
utests/CMakeLists.txt| 1 +
utests/compiler_workgroup_reduce.cpp | 174
Add more support for relaese 3.8
Signed-off-by: Pan Xiuli
---
backend/src/backend/gen_program.cpp | 2 +-
backend/src/backend/program.cpp | 2 +-
backend/src/llvm/ExpandConstantExpr.cpp | 2 +-
backend/src/llvm/llvm_to_gen.cpp| 4
Hi All,
I'll develop a board based on the Intel x5-Z8300. In this board must be run an
application based on OpenCL, this its possible right now?
Currently I'm testing over on "Tronsmart Ara x5" running Debian Jessie,
Kernel 3.16.0-4-amd64
Does Beignet supports the Gen 8 GPU?
Best regards,
--
Hi All,
I'll develop a board based on the Intel x5-Z8300. In this board must be run an
application based on OpenCL, this its possible right now?
Currently I'm testing over on "Tronsmart Ara x5" running Debian Jessie,
kernel 3.16.0-4-amd64
Does Beignet supports the Gen 8 GPU?
Best regards,
--
From: Junyan He
We failed to handle -I "/XX X/YY YY/" like path passed
from the build option. We need to consider the spaces
here and pass it correctly to Clang.
Signed-off-by: Junyan He
---
backend/src/backend/program.cpp | 51
V2 just fix some typo, please just ignore the previous one.
This patch should be merget to master and release1.1
On Wed, Jan 20, 2016 at 05:57:20PM +0800, junyan...@inbox.com wrote:
> Date: Wed, 20 Jan 2016 17:57:20 +0800
> From: junyan...@inbox.com
> To: beignet@lists.freedesktop.org
> Subject:
it does, but beignet should fail graciously with an error message then, not
segfault. and it used to work even with haswell.
groo@hydra:~/devel/opencl/tools-master$ ./cl-demo 1 10
Choose platform:
[0] Intel
[1] Mesa
Enter choice: 0
Choose device:
[0] Intel(R) HD Graphics Haswell Ultrabook GT2
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