From: Pan Xiuli
Move the block pack/unpack into instruction selection in order to get
optimization.
Signed-off-by: Pan Xiuli
---
backend/src/backend/gen_context.cpp| 459 ++---
backend/src/backend/gen_insn_selection.cpp | 439 ---
2 files
From: Pan Xiuli
When we need some subnr bigger than one reg size, we can get that offset
in selection instruction output.
Signed-off-by: Pan Xiuli
---
backend/src/backend/gen_insn_selection_output.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/backend/src/backend/gen_i
Pushed the first 5 of 7 of this patchset.
As discuss offline, remove some useless "sel.curr.flag = 0; sel.curr.subFlag =
1;" code when sel.curr.physicalFlag = 0;
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Xiuli Pan
> Sent: Monday, N
As discuss offline, can use extra = {0} to initialize the extra, it is more
clearly, so push extra = {0} version patch.
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Xiuli Pan
> Sent: Friday, December 9, 2016 11:09
> To: beignet@lists.f
From: Yan Wang
Jump threading pass could optimize the connection between LLVM
basic blocks of the function and provide the chance to merge and
remove unnecessary basic blocks to reduce the compilation time and
ASM code size.
Signed-off-by: Yan Wang
---
backend/src/llvm/llvm_to_gen.cpp | 2 +-
> -Original Message-
> From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
> Simon Richter
> Sent: Thursday, December 8, 2016 20:36
> To: beignet@lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH] Runtime: Use cl_ulong as
> CL_DEVICE_MAX_MEM_ALLOC_SIZE's return t
good catch, looks fine to me, thanks.
-Original Message-
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of Xiuli
Pan
Sent: Friday, December 09, 2016 11:09 AM
To: beignet@lists.freedesktop.org
Cc: Pan, Xiuli
Subject: [Beignet] [PATCH V2] Backend: Initialize the extr
From: Pan Xiuli
If we do not initialize the extra, we may get some random result when
just use some bits of the extra, ex splitSend.
V2: Refine the value to be uint64_t to make sure all bits is set
Signed-off-by: Pan Xiuli
---
backend/src/backend/gen_insn_selection.cpp | 2 +-
backend/src/back
hi,
please ignore all my un-pushed patches.
I got a new idea after discussed with Xiuli, I'll add a function parameter
'useSends' for the encoder, so we can switch instructions sends and send inside
the encoder function even if all the message payloads are continuous.
thanks
yejun
-Origin
Hi,
On Thu, Dec 08, 2016 at 03:47:28PM +0800, Yang Rong wrote:
> diff --git a/src/cl_device_id.c b/src/cl_device_id.c
> index 24334fd..71a7be1 100644
> --- a/src/cl_device_id.c
> +++ b/src/cl_device_id.c
> @@ -926,6 +926,7 @@ cl_get_device_ids(cl_platform_idplatform,
> }
From: Pan Xiuli
If we do not initialize the extra, we may get some random result when
just use some bits of the extra, ex splitSend.
Signed-off-by: Pan Xiuli
---
backend/src/backend/gen_insn_selection.cpp | 2 +-
backend/src/backend/gen_insn_selection.hpp | 1 +
2 files changed, 2 insertions(+
From: Meng Mengmeng
Signed-off-by: Yang Rong
---
backend/src/ir/profiling.cpp | 2 +-
src/cl_command_queue_gen7.c | 2 +-
src/cl_kernel.c | 8
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/backend/src/ir/profiling.cpp b/backend/src/ir/profiling.cpp
index
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