https://sourceware.org/bugzilla/show_bug.cgi?id=10288
Alan Modra changed:
What|Removed |Added
Status|WAITING |RESOLVED
Resolution|---
https://sourceware.org/bugzilla/show_bug.cgi?id=10288
Andreas Schwab changed:
What|Removed |Added
Status|NEW |WAITING
Component|core
https://sourceware.org/bugzilla/show_bug.cgi?id=10288
chastity red changed:
What|Removed |Added
CC||maipdf1 at gmail dot com
--- Comment
https://sourceware.org/bugzilla/show_bug.cgi?id=10288
Gilbie Rivas changed:
What|Removed |Added
CC||rivasgilbie121 at gmail dot com
---
--- Additional Comments From chris at seberino dot org 2009-08-04 17:03
---
Nick
Would it be possible for me to take a few weeks break from our work on
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
and come back to it? Other things came up in the short term and these last few
--- Additional Comments From cvs-commit at gcc dot gnu dot org 2009-07-20
12:11 ---
Subject: Bug 10288
CVSROOT:/cvs/src
Module name:src
Changes by: ni...@sourceware.org2009-07-20 12:11:18
Modified files:
opcodes: ChangeLog arm-dis.c
Log message:
--- Additional Comments From nickc at redhat dot com 2009-07-20 12:16
---
Hi Chris,
OK, I have checked in a patch to handle the SBZ field in addressing mode 3.
Cheers
Nick
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
--- You are receiving this mail because:
--- Additional Comments From chris at seberino dot org 2009-07-16 18:16
---
Nick
Many bit regions in ARM instructions are specified as SBZ Should Be Zero.
ARM docs say if these bits are NOT zero that the results are UNPREDICTABLE for
all ARM chips!
So the question is what is the best
--- Additional Comments From cvs-commit at gcc dot gnu dot org 2009-07-14
14:17 ---
Subject: Bug 10288
CVSROOT:/cvs/src
Module name:src
Changes by: ni...@sourceware.org2009-07-14 14:16:35
Modified files:
opcodes: ChangeLog arm-dis.c
Log message:
--- Additional Comments From nickc at redhat dot com 2009-07-14 14:17
---
Created an attachment (id=4052)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4052action=view)
Addressing mode fixes
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
--- You are receiving
--- Additional Comments From nickc at redhat dot com 2009-07-14 14:20
---
Hi Chris,
My guess is there is some lag time between when your email notice arrives in
my mailbox and the new tarballs get posted.
True - it is an automatic script that only runs once a day. For faster
--- Additional Comments From chris at seberino dot org 2009-07-11 06:22
---
OK. Here is first bug from the serious testing
00b0 strheq r0, [r0], r0
That should be strheq r0, [r0], -r0 --- notice the negative
cs
--
--- Additional Comments From chris at seberino dot org 2009-07-11 06:33
---
I think all of the following are wrong. This asr part of addressing mode must
be instructions like 0x005Z for Z=0,1,2,3, ...
*not* 0x00dZ. --- notice the d.
340: 00d0andeq r0,
--- Additional Comments From chris at seberino dot org 2009-07-11 06:37
---
I think all of the following are wrong. This ror part of addressing mode 1
must
be instructions like 0x007Z for Z=0,1,2,3, ...
*not* 0x00fZ. --- notice the f.
3c0: 00f0andeq
--- Additional Comments From chris at seberino dot org 2009-07-10 18:46
---
Nick
Sorry this is the second time I sent out a false alarm. My guess is there is
some lag time between when your email notice arrives in my mailbox and the new
tarballs get posted. Hence, I end up pulling an
--- Additional Comments From nickc at redhat dot com 2009-07-07 14:44
---
Created an attachment (id=4042)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4042action=view)
Catch unexpected STRB scaled addressing modes
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
--- Additional Comments From nickc at redhat dot com 2009-07-07 14:45
---
Hi Chris,
I have uploaded another patch which should take care of the bogus STRB
addressing modes. I will be checking it into the mainline sources shortly.
Cheers
Nick
--
--- Additional Comments From cvs-commit at gcc dot gnu dot org 2009-07-07
14:46 ---
Subject: Bug 10288
CVSROOT:/cvs/src
Module name:src
Changes by: ni...@sourceware.org2009-07-07 14:46:14
Modified files:
opcodes: ChangeLog arm-dis.c
Log message:
--- Additional Comments From chris at seberino dot org 2009-07-07 17:41
---
Nick,
I'm very glad you are still sending patches on this. I very much appreciate it.
We are almost done
I was afraid this would happen. It seems for some reason often when we try to
fix something
--- Additional Comments From chris at seberino dot org 2009-07-03 06:10
---
I just rebuilt latest binutils Th 7/2/09 evening PST and it seems better now. I
don't know if you fixed something in the interim or I blew it in my last test.
The only problem that is still around is the
--- Additional Comments From chris at seberino dot org 2009-07-03 19:26
---
I didn't see a comment with ; ldccc 2, cr10, [sp, #312]
Nick
I owe you an apology. I do see this comment. The only lingering problem is the
strb nonexistent addressing mode.
I will now start
Hi Chris,
More importantly, it looks like you reintroduced DSP instructions and
instructions for later CPU architectures that don't belong in ARM7TDMI like...
mrrc, blx and ldc2.
Are you sure ? I could not reproduce these.
There was also some unidentifiable instructions I didn't know what
--- Additional Comments From nickc at redhat dot com 2009-07-02 16:40
---
Subject: Re: objdump -D --target=binary -m arm7tdmi
shows non-ARM7TDMI instructions
Hi Chris,
More importantly, it looks like you reintroduced DSP instructions and
instructions for later CPU architectures
--- Additional Comments From chris at seberino dot org 2009-07-02 17:28
---
(In reply to comment #27)
Subject: Re: objdump -D --target=binary -m arm7tdmi
showsnon-ARM7TDMI instructions
Hi Chris,
More importantly, it looks like you reintroduced DSP instructions and
--- Additional Comments From cvs-commit at gcc dot gnu dot org 2009-06-30
11:57 ---
Subject: Bug 10288
CVSROOT:/cvs/src
Module name:src
Changes by: ni...@sourceware.org2009-06-30 11:57:06
Modified files:
opcodes: ChangeLog arm-dis.c
--- Additional Comments From nickc at redhat dot com 2009-06-30 12:03
---
Hi Chris,
Right, I have checked in the (uploaded) patch to further improve the
consistency of the disassembler's output.
With regard to LFM and SFM I do still think that they should disassembled and
--- Additional Comments From nickc at redhat dot com 2009-06-30 11:58
---
Created an attachment (id=4030)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4030action=view)
More disassembly consistency improvements
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
--- Additional Comments From cvs-commit at gcc dot gnu dot org 2009-06-29
08:08 ---
Subject: Bug 10288
CVSROOT:/cvs/src
Module name:src
Changes by: ni...@sourceware.org2009-06-29 08:08:15
Modified files:
opcodes: ChangeLog arm-dis.c
--- Additional Comments From nickc at redhat dot com 2009-06-29 08:35
---
Hi Chris,
Right - I have checked in the patch as it stands at the moment
(pr10288.patch.3). I will not close this PR though. I am going to look at the
new problems you have raised today and, I hope, create a
--- Additional Comments From nickc at redhat dot com 2009-06-25 07:16
---
Created an attachment (id=4020)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4020action=view)
Updated version of previous patch
--
What|Removed |Added
--- Additional Comments From nickc at redhat dot com 2009-06-25 07:17
---
Hi Chris,
Oops, please ignore the previous patch. I had not checked it thoroughly
enough. I have uploaded a revised version which should be better.
Cheers
Nick
--
--- Additional Comments From chris at seberino dot org 2009-06-25 18:26
---
** Incorrect or missing hex equivalents...
(If this is hard to fix and you want to just remove all hex equivalents that
would be fine by me.)
4c585ee5ldclmi 14, cr5, [r8], {229}; 0xfc6c
--- Additional Comments From nickc at redhat dot com 2009-06-24 16:40
---
Created an attachment (id=4019)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4019action=view)
Fix a few more disasssembly mistakes
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
--- You
--- Additional Comments From nickc at redhat dot com 2009-06-24 16:45
---
Hi Chris,
1. mrrcmi is an extended DSP instruction that doesn't belong on ARM7TDMI
right?
Right. This was a typo in the arm-dis.c file.
2. According to my ARM ref manual, strb needs to have bits 4-11
--- Additional Comments From chris at seberino dot org 2009-06-24 20:14
---
mrrc is gone with is good. strb appears to have gotten worse! I think the new
patch introduced new bugs into strb. See below. Also, some hex equivalents
appear to be botched. See below for that too
New
--- Additional Comments From chris at seberino dot org 2009-06-24 22:32
---
About lfm and sfm.these are alternative aliases for floating point
coprocessor instructions along with many others in the ARM docs I've seen.
We can't guarantee that every ARM7TDMI will have a floating
--- Additional Comments From nickc at redhat dot com 2009-06-22 11:45
---
Created an attachment (id=4011)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4011action=view)
Combination patch for pr 10297 and 10288
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
---
--- Additional Comments From nickc at redhat dot com 2009-06-22 11:45
---
Hi Chris,
Please try out the newly uploaded, combined patch.
Cheers
Nick
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
--- You are receiving this mail because: ---
You are on the CC
--- Additional Comments From chris at seberino dot org 2009-06-22 19:43
---
The undefined fix is very nice. I did find some issues and have appended a
Python script to reproduce...
#==The Python script
import struct
raw_binary =
--- Additional Comments From chris at seberino dot org 2009-06-22 21:53
---
I was thinking a little more about the lfm instruction. It seems there are
standard coprocessor instruction names on ARM: cdp, ldc, stc, mcr and mrc.
And, because ARM defines optional standard coprocessor
--- Additional Comments From nickc at redhat dot com 2009-06-19 14:51
---
Created an attachment (id=4009)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4009action=view)
Fix coprocessor opcode discrimination
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
---
--- Additional Comments From nickc at redhat dot com 2009-06-19 14:51
---
Hi Chris,
I take your point. Please try out the uploaded additional patch which should
fix this.
Cheers
Nick
--
What|Removed |Added
--- Additional Comments From chris at seberino dot org 2009-06-19 17:50
---
I can't apply patch from bug #10288 and bug #10297 at same time.
They crash into each other when you try to apply both of them.
Can you make a patch that includes both fixes?
chris
--
--- Additional Comments From cvs-commit at gcc dot gnu dot org 2009-06-18
10:31 ---
Subject: Bug 10288
CVSROOT:/cvs/src
Module name:src
Changes by: ni...@sourceware.org2009-06-18 10:31:21
Modified files:
include: ChangeLog dis-asm.h
--- Additional Comments From chris at seberino dot org 2009-06-18 18:33
---
I think your patch may have done more than you think. It not only removed
coprocessor instructions that are not supported by ARM7TDMI, but also removed
coprocessor instructions that *are* supported by ARM7TDMI.
--- Additional Comments From nickc at redhat dot com 2009-06-17 12:22
---
Created an attachment (id=4003)
-- (http://sourceware.org/bugzilla/attachment.cgi?id=4003action=view)
Use -m to restrict ARM disassembly
--
http://sourceware.org/bugzilla/show_bug.cgi?id=10288
--- You
--- Additional Comments From nickc at redhat dot com 2009-06-17 12:24
---
Hi Chris,
Thanks for reporting this problem. Please could you try out the uploaded
patch and let me know how you get on with it. (Note - you will need to remove
the earlier version of this patch sent to you
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