https://sourceware.org/bugzilla/show_bug.cgi?id=25332
Bug ID: 25332 Summary: Error: selected processor does not support `stclrb w2,[x1]' for cortex-a53 Product: binutils Version: 2.32 Status: UNCONFIRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: petemoore at gmx dot net Target Milestone: --- GNU gas 2.32 considers that the A64 instruction stclrb instruction is not supported on cortex-a53, however this differs from my understanding of the ARM documentation. gas version: ``` $ /usr/local/bin/aarch64-unknown-linux-gnu-as --version GNU assembler (crosstool-NG 1.24.0) 2.32 Copyright (C) 2019 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or later. This program has absolutely no warranty. This assembler was configured for a target of `aarch64-unknown-linux-gnu'. ``` Test code: ``` $ cat stclrb.s .arch armv8-a .cpu cortex-a53 .global _start .text _start: stclrb w2, [x1] ``` Assembler output: ``` $ /usr/local/bin/aarch64-unknown-linux-gnu-as -mcpu=cortex-a53 -mverbose-error -g -o stclrb stclrb.s stclrb.s: Assembler messages: stclrb.s:6: Error: selected processor does not support `stclrb w2,[x1]' ``` The Arm Cortex-A53 MPCore Processor Technical Reference Manual Revision r0p4[1] says: > 1.2.1. Arm architecture > > The Cortex-A53 processor implements the Armv8-A architecture. This includes: > * Support for both AArch32 and AArch64 Execution states. > * Support for all Exception levels, EL0, EL1, EL2, and EL3, in each > execution state. > * The A32 instruction set, previously called the Arm instruction set. > * The T32 instruction set, previously called the Thumb instruction set. > * The A64 instruction set. The A64 instruction set of the Armv8-A architecture is described in the "ArmĀ® Architecture Reference Manual Armv8, for Armv8-A architecture profile"[2], and in the most recent version of this document (version ea[3]) at the time of writing, the STCLRB instruction is defined in section "C6.2 Alphabetical list of A64 base instructions" under subsection C6.2.249 with heading "STCLRB, STCLRLB". I therefore am led to believe that STCLRB indeed is part of the base A64 instruction set of the ARMv8-A architecture (not an optional architecture extension), supported by the ARM Cortex A53 MP Core Processor, and therefore that this example test program should compile without reporting an error. -- [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500j/BABHJJBC.html [2] https://developer.arm.com/docs/ddi0487/ea/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile [3] https://static.docs.arm.com/ddi0487/ea/DDI0487E_a_armv8_arm.pdf?_ga=2.16163382.1622503159.1577875323-1539468621.1577875323 -- You are receiving this mail because: You are on the CC list for the bug.