https://sourceware.org/bugzilla/show_bug.cgi?id=28793
Bug ID: 28793 Summary: [RISC-V] DW_cfa_advance_offset is not correct Product: binutils Version: 2.38 (HEAD) Status: UNCONFIRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: lifang_xia at linux dot alibaba.com Target Milestone: --- Created attachment 13915 --> https://sourceware.org/bugzilla/attachment.cgi?id=13915&action=edit pic of eh_frame commit: HEAD ======== build config: ../configure --disable-gdb --target=riscv64-unknown-linux-gnu ======== test: .global hello hello: .cfi_startproc nop addi sp,sp,-32 .cfi_def_cfa_offset 32 sd ra,24(sp) sd s0,16(sp) sd s1,8(sp) .cfi_offset 1, -8 .cfi_offset 8, -16 .cfi_offset 9, -24 ld ra,24(sp) .LXXXXX: .cfi_remember_state .cfi_restore 1 ld s0,16(sp) .cfi_restore 8 ld s1,8(sp) .cfi_restore 9 addi sp,sp,32 .LXXXXA: .cfi_def_cfa_offset 0 jr ra .LVL1034: .align 2 .L1035: .cfi_restore_state .LEHB7: jalr a5 .LVL1035: .LBE2445: .LBE2448: ld ra,24(sp) .cfi_remember_state .cfi_restore 1 ld s0,16(sp) .cfi_restore 8 ld s1,8(sp) .cfi_restore 9 addi sp,sp,32 .cfi_def_cfa_offset 0 jr ra .cfi_restore_state .cfi_endproc ======== command: ./gas/as-new -o a.o a.s -march=rv64gc ./ld/ld-new -o a a.o -e hello ./binutils/objdump -d a ./binutils/readelf -w a ======== eh_frame In the picture, the DW_CFA_advance_loc should be 0x100c4, but the result is 0x100c6; If delete the nop in the head of the source. The DW_CFA_advance_loc is 0x100c4. ======== why ".align 2" in .LVL1034 will create a relocation in the .o, and the nop for alignment will be remove in linker. But the DW_CFA_advance_loc is fixed while assembling. We need to start a new frag after alignment. It is same like the instruction that can be optimized away or compressed by the linker during relaxation. ========= patch diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 390aaf1710b..ed1e771d290 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -4462,6 +4462,21 @@ s_variant_cc (int ignored ATTRIBUTE_UNUSED) elfsym->internal_elf_sym.st_other |= STO_RISCV_VARIANT_CC; } +/* Split frag after alignment. */ +static void +s_riscv_align (int arg) +{ + s_align_ptwo (arg); + + /* We need to start a new frag after alignment which may be remove by the + linker during relaxation, to prevent the assembler from computing static + offsets. + This is necessary to get correct EH info. */ + + frag_wane (frag_now); + frag_new (0); +} + /* Same as elf_copy_symbol_attributes, but without copying st_other. This is needed so RISC-V specific st_other values can be independently specified for an IFUNC resolver (that is called by the dynamic linker) @@ -4507,6 +4522,7 @@ static const pseudo_typeS riscv_pseudo_table[] = {"insn", s_riscv_insn, 0}, {"attribute", s_riscv_attribute, 0}, {"variant_cc", s_variant_cc, 0}, + {"align", s_riscv_align, 0}, { NULL, NULL, 0 }, }; -- You are receiving this mail because: You are on the CC list for the bug.