Do you have detailed test results/logs?
Thanks,
Marc
Am Di., 19. Dez. 2023 um 23:13 Uhr schrieb Bruno Haible :
> My (preliminary) test results:
>
> The test passes on x86_64, m68k, alpha, s390, s390x, riscv64, loongarch64.
>
> It fails on some platforms with i386, mips, sparc, arm, arm64
>
> It
My (preliminary) test results:
The test passes on x86_64, m68k, alpha, s390, s390x, riscv64, loongarch64.
It fails on some platforms with i386, mips, sparc, arm, arm64
It fails on all platforms with powerpc*, ia64.
Bruno
Hi Marc,
> I forgot to actually make use of the patched part in the test case; here is
> the full patch. Please excuse the mess.
Looks good to me. As I want to start testing it, I committed the patch for you.
Bruno
I forgot to actually make use of the patched part in the test case; here is
the full patch. Please excuse the mess.
Am Mo., 27. Nov. 2023 um 18:36 Uhr schrieb Marc Nieper-Wißkirchen <
marc.nieper+...@gmail.com>:
> Am Mo., 27. Nov. 2023 um 17:27 Uhr schrieb Marc Nieper-Wißkirchen <
> marc.niepe
Am Mo., 27. Nov. 2023 um 17:27 Uhr schrieb Marc Nieper-Wißkirchen <
marc.nieper+...@gmail.com>:
[...]
> For the moment, I expect
>> - a SIGSEGV on powerpc*-aix, powerpc64-linux, ia64, hppa, and hppa64
>> due to the structure of function pointers, see
>>
>> https://git.savannah.gnu.org/git
Am Sa., 25. Nov. 2023 um 21:19 Uhr schrieb Bruno Haible :
> Hello Marc,
>
> > Here is my attempt at a simple unit test for your new cache module.
> >
> > I have tested it on an x86 box (where the instruction cache is always in
> > sync) and on an Armv8 Raspberry, both running GNU/Linux. Commentin
Hello Marc,
> Here is my attempt at a simple unit test for your new cache module.
>
> I have tested it on an x86 box (where the instruction cache is always in
> sync) and on an Armv8 Raspberry, both running GNU/Linux. Commenting out
> the call to `clear_cache' shows that `clear_cache' is not a N
Hello Bruno,
Here is my attempt at a simple unit test for your new cache module.
I have tested it on an x86 box (where the instruction cache is always in
sync) and on an Armv8 Raspberry, both running GNU/Linux. Commenting out
the call to `clear_cache' shows that `clear_cache' is not a NOP on Arm
> * m4/valgrind-helper.m4: New file.
Oops, that file was incomplete. Fixed like this:
2023-11-13 Bruno Haible
jit/cache: Fix configure test.
* m4/valgrind-helper.m4 (gl_VALGRIND_HELPER): Check already at configure
time whether exists. Fix AC_DEFINE_UNQUOTED
