Hi,
Why the below makefile fails with the error text "_Makefile:16: ***
extraneous `endef'. Stop._"?
Thanks.
#---
*define Var1
ifneq (1,1)
define Var2
define Var3
endef
endef
endif
endef
.PHONY : EmptyTarget
EmptyTarget : ;
$(eval $(value Var1))*
#
-- Forwarded message --
From: Tim Murphy
Date: 2009/9/6
Subject: Re: Why "*** extraneous `endef'. Stop."?
To: a...@gnu.org
Oh dear - sorry - I'm an idiot.
All I can say is that the ifneq statement is what makes it go wrong
for me. Using $(if works for me
Hi,
define starts a macro. Everything from the start of the macro to
endef is just text and is not evaluated.
So your inner "define" is not recognised - it's just treated as text.
That means that the dirst endef matches the first define and all the
other endefs seem to have no corresponding defi
define starts a macro. Everything from the start of the macro to
endef is just text and is not evaluated.
So your inner "define" is not recognised - it's just treated as
text. That means that the dirst endef matches the first define and
all the other endefs seem to have no corresp
It seems to me this is a bug.
All will be fine if we just rewrite 'ifneq (1,1)' as 'ifeq (1,1)'.
That is why I sent the question.
I hope someone will add an item in the bug tracker (who know `make'
better than me and will confirm this supposition).
Alfred M. Szmidt wrote:
define starts a
On Sun, Sep 6, 2009 at 8:09 AM, Sergey Zubkovsky wrote:
> It seems to me this is a bug.
>
> All will be fine if we just rewrite 'ifneq (1,1)' as 'ifeq (1,1)'.
>
> That is why I sent the question.
> I hope someone will add an item in the bug tracker (who know `make' better
> than me and will confirm
Thanks to All for the answers!
I'll submit the issue.
Just two questions from a novice like me: is the 'make' at "active"
development stage?
I'm looking to "http://savannah.gnu.org/bugs/?group=make";.
There are many hang up issues. They are dated by previous years and
don't assigned to anyone
