Re: RFR: 8285630: Fix a configure error in RISC-V cross build [v2]

2022-04-28 Thread Feilong Jiang
On Thu, 28 Apr 2022 07:27:36 GMT, Pengfei Li wrote: >> We are trying to cross build a RISC-V version of OpenJDK. We specified >> `--openjdk-target=riscv64-linux-gnu` after `bash configure` but got an >> error message. >> >> >> configure: error: /usr/bin/bash >> /home/ent-user/jdk_src/make/auto

Re: RFR: 8285630: Fix a configure error in RISC-V cross build

2022-04-27 Thread Feilong Jiang
On Wed, 27 Apr 2022 09:50:35 GMT, Pengfei Li wrote: > We are trying to cross build a RISC-V version of OpenJDK. We specified > `--openjdk-target=riscv64-linux-gnu` after `bash configure` but got an > error message. > > > configure: error: /usr/bin/bash > /home/ent-user/jdk_src/make/autoconf/bu

Integrated: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture

2022-04-21 Thread Feilong Jiang
On Mon, 18 Apr 2022 09:07:03 GMT, Feilong Jiang wrote: > This patch adds Zero support for the 32-bit RISC-V architecture. > > Additional tests: > > - [x] Linux zero RISCV32 cross-compilation > - [x] Resulting binaries run on QEMU User mode without problems This pull re

Re: RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v3]

2022-04-20 Thread Feilong Jiang
On Mon, 18 Apr 2022 12:29:41 GMT, Erik Joelsson wrote: >> Feilong Jiang has updated the pull request with a new target base due to a >> merge or a rebase. The incremental webrev excludes the unrelated changes >> brought in by the merge/rebase. The pull request contain

Re: RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v3]

2022-04-19 Thread Feilong Jiang
> This patch adds Zero support for the 32-bit RISC-V architecture. > > Additional tests: > > - [x] Linux zero RISCV32 cross-compilation > - [x] Resulting binaries run on QEMU User mode without problems Feilong Jiang has updated the pull request with a new target base due to a

Re: RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v2]

2022-04-19 Thread Feilong Jiang
On Tue, 19 Apr 2022 11:22:37 GMT, Thomas Stuefe wrote: > LGTM > > Cheers, Thomas > > P.S. I assume you did not run the whole gamut of jtreg tests, right? Seems to > me there are a number of tests which would need to get adapted for riscv32. Thanks for the review, Thomas. Currently, we only te

Re: RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v2]

2022-04-19 Thread Feilong Jiang
> This patch adds Zero support for the 32-bit RISC-V architecture. > > Additional tests: > > - [x] Linux zero RISCV32 cross-compilation > - [x] Resulting binaries run on QEMU User mode without problems Feilong Jiang has updated the pull request incrementally with one additi

Re: RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v2]

2022-04-19 Thread Feilong Jiang
On Mon, 18 Apr 2022 15:27:07 GMT, Yadong Wang wrote: >> Feilong Jiang has updated the pull request incrementally with one additional >> commit since the last revision: >> >> adjust SYS_futex define for RISCV32 > > src/hotspot/os/linux/waitBarrier_linux.

RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture

2022-04-18 Thread Feilong Jiang
This patch adds Zero support for the 32-bit RISC-V architecture. Additional tests: - [x] Linux zero RISCV32 cross-compilation - [x] Resulting binaries run on QEMU User mode without problems - Commit messages: - Add support for 32-bit risc-v zero Changes: https://git.openjdk.java.n