On Mon, Jul 23, 2018 at 5:52 AM Mikael Abrahamsson wrote:
>
> On Sat, 21 Jul 2018, Jonathan Morton wrote:
>
> > An example of such a situation would be sparse flows in DRR++, which is
> > a key part of fq_codel and Cake. So to implement DRR++ using timing
> > wheels, you have to choose your sched
On Sat, 21 Jul 2018, Jonathan Morton wrote:
An example of such a situation would be sparse flows in DRR++, which is
a key part of fq_codel and Cake. So to implement DRR++ using timing
wheels, you have to choose your scheduling horizon carefully so as to
minimise the delay to sparse packets.
