Hi all, I'm trying to get the tute 3 spectrometer design running at
250MHz, and am running into timing issues. The timing report suggests
problems in the PFB and FFT -- does anyone have some recommended
settings for the PFB and FFT (i.e. latencies etc), before I start adding
delays
Try adder latency 1, multiplier latency 2, bram latency 3. Be sure to optimise
to use DSP48 multipliers and tick any boxes asking to pull adders into DSP48s.
This should allow adders following multipliers to use a single DSP48 slice,
with registered input and output (making for a shorter signal
hi danny,
i suggest trying jason's items first (below),
and then if you are still having trouble, talk to suraj gowda,
who got got the PFB and FFT to work at about 375 MHz
by using xilinx's plan-ahead and calling out more explicit
utilization of DSP48 slices for the FFT butterflies.
suraj will
Hi
To add to Jason's suggestions: Conversion latency = 3
The documentation on the FFT blocks at
http://casper.berkeley.edu/wiki/Block_Documentation is quite recent and
contains some suggestions and explanations.
Good luck
Regards
Andrew
Hi,
After a compile fails, it's worth checking the timing report in the compile
directory /XPS_ROACH_BASE/implementation/system.twr
Whilst a little bit cryptic, the report should at least give you some idea
of which bits of the design are causing timing failure. It becomes
reasonably clear if
Hi,
Have you tried the old 'set the clock pin location to d7' trick?
See here: http://casper.berkeley.edu/astrobaki/index.php/CasperTutorial01 --
Section 2.1
Cheers,
Jack
On 3 September 2010 18:34, r...@physics.ucsb.edu wrote:
I am sorry I didn't provide more detail. I
have Matlab
Hi Ron,
Have you done the trick of entering 'd7' into the clock pin location field of
the system generator block, and then clearing it? If you're new to the
toolflow, then you probably hadn't heard of this, but when you don't do it, the
error message you quoted appears.
As far as I know, the
Hi Ron,
I'm not sure about this, but I found something in the CASPER email archive:
http://www.mail-archive.com/casper@lists.berkeley.edu/msg01707.html
where Mark suggested that you open the sysgen token and put 'd7' into the
clock pin location.
Would you mind give it a try?
Thanks,
-Hong
On
Hi, Andrea,
On Sep 3, 2010, at 2:07 , Andrea Mattana wrote:
yes, I have often done the 'git pull' that's why I was sure to be
up to
date, but I never tried to use the '--ff-only' argument.
The --ff-only option is not necessary; it is only for a sanity
check to make sure that nothing has
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