Hi Miguel
With regards to your second problem:
I've had a similar problem before, where I would write registers in
KATCP, but when I read them back, they were all zeroes. I "fixed" this
by deleting ALL the temporary and output files that Simulink generated,
and recompiling the design from scr
Hi all,
I've made a model with the ACD and 10gb core. The simulation seems to be
ok and I have the bof file too but when I program the fpga I get two
problems:
1.- "There is no cable plugged into port 0" (but yes there is).
Surprinsingly this problem only happens sometimes. It is not becau
2 matches
Mail list logo