I am sorry. I mean the other ADC may be out
of phase with the FPGA clock.
> No. I want to have both ADC boards be of the
> same type. The new concern I have is that you
> express doubt that the yellow blocks will
> sync the two ADC's on our ROACH board. If one
> ADC is out of sync with the other,
No. I want to have both ADC boards be of the
same type. The new concern I have is that you
express doubt that the yellow blocks will
sync the two ADC's on our ROACH board. If one
ADC is out of sync with the other, I expect
the ADC generating the FPGA clock will be in
sync but the other ADC may be 9
On May 3, 2013, at 12:09 PM, Dan Werthimer wrote:
> the yellow block initialization checks the clock
> output from both adc's and resets one of
> the adc's until both clocks are synced up.
I know this happened on the iBobs, but I'm not sure it is still the case on the
ROACH (or ROACH2).
Ron, a
hi ron,
you must connect the sample clock generator
to both adc boards in a dual adc system.
to do this, you'll need a 2:1 power splitter
(about $25 from minicircuits).
you can purchase sample clock generators
from valon technologies.
the ADC2x1000-8 and ADC1x3000-8
yellow blocks will sync toget
I am sorry I didn't check my email earlier.
I thought I would need a special connection
between the two ADC boards for such sync. I
originally planned to connect the clock to
the clock inputs of both ADC boards, but
then realized that one ADC could generate
the FPGA clock but the other may be out o
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