Hi All
I have just completed a rather large overhaul of the CASPER FFT family.
Rigorous testing has yet to be performed but it "works" at the moment
and has been pushed to the ska-sa repo on github for early adopters/testers.
The main aim (and reason this email continues this thread) was to s
> Hi, Jeff,
>
> Matt pointed out to me that the crystals on the ROACH2 are pretty nice
> (100 MHz +/- 25 ppm). Maybe this one misbehaving ROACH2 has a bad crystal
> (or a badly soldered crystal)?
>
> FWIW, when the PAPER correlator used FPGA-based X engines, the X engines
> ran asynchronously from
casperians,
can you please advise lijian where to get 2011 and 2012 tutorials?
please see email below.
lijian,
i suggest you use the 2012 tutorials rather than the 2011 tutorials.
best wishes,
dan
On Tue, Jul 16, 2013 at 1:34 AM, 李健(lijian) wrote:
> **
> Hi Dan
> I want to test tut9 as
Hi, John,
On Jul 16, 2013, at 7:41 AM, John Ford wrote:
>> FWIW, when the PAPER correlator used FPGA-based X engines, the X engines
>> ran asynchronously from the F engines at 5% faster than the F engines (210
>> MHz vs 200 MHz). I don't really understand why they ran asynchronously.
>> IMHO, it
Wow! Thanks, Andrew, that sounds like a lot of work! Do you have any
utilization comparisons of old vs new?
Dave
On Jul 16, 2013, at 6:22 AM, Andrew Martens wrote:
> Hi All
>
> I have just completed a rather large overhaul of the CASPER FFT family.
> Rigorous testing has yet to be performed
Hi all,
I wonder if the adc yellow blocks in simulink implement the on-chip demux
of adc data, i.e. the adc yellow blocks only serve as a 2:1 demux of zdok
input data using DDR at fpga side regardless of what has already been done
on adc board.
If I want the ddr only at fpga to use another 8-bit
Hi all,
The memory footprint of the fft_direct block could be reduced if it is
split into two blocks, one for the operator to manipulate the phase of the
FFT of each input and another block to calculate the true direct-form FFT,
i.e. not mapping together a larger FFT (see p. 615 of
http://apps.nrbo
hi xuexiu,
some of the adc yellow blocks implement a 4:1 demux
(eg: data comes in from the adc at 1 Gbit/sec per lane,
and data emerges from the yellow block at 250 MHz, but
four times wider),
and some of the adc yellow blocks implement a 2:1 demux.
and some of the adc yellow blocks do not impl
Hi Dave
Do you have any utilization comparisons of old vs new?
Not yet, I hope to do a basic one soon though. Savings will depend on
use case. Also, you can optimise for resources in a few ways (DSPs vs
BRAMs when using fft_direct, logic vs BRAMS in the biplex stages and in
"reset point" stor
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