Dear CASPER experts,
I'm sorry for this spam. I'm an exchange undergraduate student working in
Yale university now. I had a problem while using Python to connect my PC to
the ROACH2 board.
I've gotten .fpg files already using Simulink and Xilinx ISE. Now my
purpose is to load the file to the board
Hi Randy,
I think the issue is that you are processing 16 samples per FPGA clock for
VEGAS (if I remember right), so I expect you'll need to hand craft an FFT
out of the FFT direct block and twiddle blocks. It might be easier to use a
xilinx block in this case, but I haven't actually looked at what
All,
We're currently in the process of adding incoherent and coherent
de-dispersion
pulsar modes to our ROACH 2-based VEGAS backend and have hit a stumbling
block. We've built all designs ranging from 8,192 channels down to 64
channels,
but when attempting to implement a 32-channel design th
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