I can run jasper to build rfsoc4x2_tut_rfdc_real.slx 
<https://github.com/casper-astro/tutorials_devel/blob/main/rfsoc/tut_rfdc/rfsoc4x2_tut_rfdc_real.slx>
  
and rfsoc4x2_tut_spec.slx 
<https://github.com/casper-astro/tutorials_devel/blob/main/rfsoc/tut_spec/rfsoc4x2/rfsoc4x2_tut_spec.slx>
 
examples into .fpg and .dtbo files, and they work. However, if I rename the 
.slx file or copy it to a new file to make changes, it still builds, but 
the ADC only returns -1.

When I say ANY changes to the .slx make the ADC return all -1, this has 
been reduced to even trivial things:
* renaming the .slx files with mv
* copying an .slx file to a new name with cp
* Save As within simulink
* copying and pasting the .slx contents into a new file

This is an embarrassing and trivial-sounding issue, but I don't understand 
enough about simulink or Model Composer to understand how this could be. Is 
there a filename check or checksum buried in some block in these .slx files 
or some casperfpga init code? I can't find any.

I've also failed in a similar way with the rfdc when trying to build up "by 
hand" any project with the RFDC yellow block, including the RFDC tutorial #2 
<https://casper-toolflow.readthedocs.io/projects/tutorials/en/latest/tutorials/rfsoc/tut_rfdc.html>
.

In case it's relevant I'm using all of the recommended versions:
* Ubuntu 20.04.6 LTS (in a Virtual Box virtual machine)
* Matlab R2021a
* Vivado 2021.1
* casperfpga branch py38  (not mega-merge as suggested on Getting Started 
<https://casper-toolflow.readthedocs.io/projects/tutorials/en/latest/tutorials/rfsoc/tut_getting_started.html>
)
* mlib_devel branch m2021a 

Thanks,
Jason

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