Re: [casper] QDR ROACH2: clocking at 145 MHz

mmit > 72d879c? I noticed you emailed a link to my repository which I specifically > tweaked for my higher (312MHz) work, which I'm sure breaks *everything* at > 145. > > Cheers, > Jack > > On Fri, 22 May 2015 at 06:41 Juan-Pierre Jansen van Rensburg < > jvren

Re: [casper] QDR ROACH2: clocking at 145 MHz

cy would be fewer clock cycles. > > Cheers > > On Fri, May 22, 2015 at 3:40 PM, Juan-Pierre Jansen van Rensburg < > jvrensburg...@gmail.com> wrote: > >> Hi all, >> >> I'm trying to get the QDR on the ROACH-2 to work reliably at a clock >> speed

[casper] QDR ROACH2: clocking at 145 MHz

Hi all, I'm trying to get the QDR on the ROACH-2 to work reliably at a clock speed of a 145 MHz. I'm assuming this is possible, since it has been pointed out in an earlier message that the QDR should work above 120 MHz? I'm r

Re: [casper] DRAM on ROACH2?

Hi Brad I only had time work on the FPGA interface to the DDR3 DRAM... for our application the CPU interface was more of a nice to have. The only other person that I know of who might have done some work on this is Rurik? MIG (Memory Interface Generator) is a Xilinx tool that allows you to genera

Re: [casper] DRAM (DDR3) ROACH-2

t;> >> I'll leave it to Rurik to describe what he has been doing, he talked a >> bit about bus interfaces, so perhaps the PPC comes into it. >> >> Cheers, >> >> Jonathan >> >> >> On Jul 24, 2013, at 5:48 AM, Wesley New wrote: >> >

[casper] DRAM (DDR3) ROACH-2

Hi all I have been working on a yellow block for the DDR3 of the ROACH-2. As far as I know this yellow block does not yet exist? The same DRAM yellow block is used and interfacing the memory remains the same (as for the ROACH-1). The DRAM also uses an asynchronous fifo to allow long write bursts