Hi all
Abside Networks, an emerging company in Acton, Massachusetts, developing
hardware and software for 4G/5G wireless applications, has a job opening
for Lead RF Engineer. I have worked with them in the past and they are a
great bunch of people.
Job link here:
https://www.linkedin.com/jobs/v
Rolando,
I would start with the 10Gb Ethernet tutorials on the Casper wiki:
https://casper.berkeley.edu/wiki/ROACH_10GbE_tutorial
https://casper.berkeley.edu/wiki/Tutorial_10GbE
I learnt how to use the 10GBE from these tutorials.
Please remember that the tutorials are for Roach, not IBOB, so yo
OPB bus, though.
-Alex
On Thu, Jun 5, 2014 at 3:34 PM, Simon Scott <mailto:simonsc...@berkeley.edu>> wrote:
Hi Alex
Just an idea: is this problem by any chance caused by Xilinx
dropping support for the OPB bus in recent ISE versions? If you
look around the CASPER mailin
Hi Alex
Just an idea: is this problem by any chance caused by Xilinx dropping
support for the OPB bus in recent ISE versions? If you look around the
CASPER mailing lists, I remember this being quite a big issue around 1-2
years ago.
Maybe your yellow block makes use of this bus?
Regards,
Si
Hi Norbert
It's been a while since I worked on transceivers, so I may be wrong when
I say this, but I think that you need to generate a separate core for
each transceiver on the FPGA. You can't modify a core, after you have
generated it, to make it work for another transceiver.
My suggestion
Hi Tim
I'm not sure if you've seen this, but I found this page extremely useful
in understanding how the DRAM works, in particular Laura's example ROACH
design (see link at bottom of the page, under "Example Models"):
https://casper.berkeley.edu/wiki/Dram
Regards,
Simon
On 25/08/2013 14:48,
Go to https://github.com/ska-sa/roach2_nfs_uboot/ (in a web browser) and
click on the "Zip" button. It downloads the repo in a zip file, via your
browser. Worked perfectly for me.
On 14/02/2013 10:55, David MacMahon wrote:
Hi, Guy,
That seems weird. Have you tried using the git protocol inst
Hi Mandana, Kim
From my experiences, I have never actually seen any speed increase from
enabling multithreading. But I guess it doesn't hurt to enable it anyway.
Simon Scott
On 05/06/2012 14:23, Kim Guzzino wrote:
Mandana,
The option for turning on multithreading for MAP is &q
From my experience with uBoot, you cannot ping a board running uBoot,
as uBoot does not listen for pings. You can however ping a PC from the
board running uBoot.
On 14/05/2012 00:23, Marc Welz wrote:
Hello
With the Roach1 in the uboot state. Network address (192.168.3.240)
acquired via dhcp
Hi Miguel
With regards to your second problem:
I've had a similar problem before, where I would write registers in
KATCP, but when I read them back, they were all zeroes. I "fixed" this
by deleting ALL the temporary and output files that Simulink generated,
and recompiling the design from scr
Just to report back that I "solved" the problem. I deleted all the files
that were created by Simulink/System Generator and recompiled my design
from scratch, without changing anything. This seems to have solved the
problem.
On 09/08/2011 9:17 PM, Simon Scott wrote:
Hi
I hav
write to the
register. When I read the register back, I just get zeroes.
Does anyone have any idea what could be causing this?
Thanks,
Simon Scott
Hi Zaki
Thanks for clarifying.
Much appreciated,
Simon
On 11/05/2011 5:11 PM, Zaki Ali wrote:
Hi Simon,
SPEAD packets use Network/Big endian for their items. The endianess of
the payload data is stored in the metadata.
Zaki Ali
On May 11, 2011, at 2:52 PM, Simon Scott wrote:
Hi
I was
Hi
I was wondering if there a standard byte-ordering for SPEAD packets, for
example when sending a stream of 32-bit values? If so, is it
little-endian or big-endian?
Thanks,
Simon Scott
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