Re: [casper] To disable the PAR timing check:

2013-04-04 Thread isaacjpl
Hi CASPER team, Thanks to everybody for the suggestions. Finally the problem has been solved. This a typical error when you have timing error: “ERROR: 1 constraint not met. PAR could not meet all timing constraints. A bitstream will not be generated.” It can be generated for different delays

[casper] To disable the PAR timing check:

2013-04-03 Thread isaacjpl
Hi CASPER team, I am working with the iBOB FPGA at 250 MHz and two iADCs at 1000 GHz in a correlator project. In the compilation I have a timing error ERROR: 1 constraint not met. PAR could not meet all timing