[casper] HBM memory

2021-10-04 Thread Jack Hickish
Hi CASPERites, Hope everyone is keeping well. It looks like I'm imminently going to have to dip my toe (and then probably my entire self) in the world of HBM, in order to make some reasonably large data transposes / packet construction buffers. (For the interested, I'm using a VU37P AlphaData ADM

Re: [casper] HBM memory

2021-10-04 Thread John Pallazola
Jack, Please let us know if you need any help getting FPGA, memory, and any other electronic components. We have worked with EHT, Orion space mission, and several other scientific community projects over the past 20 years. Thank you, John John Pallazola VP - Director of Inbound IBuyXS | IBuyP

Re: [casper] HBM memory

2021-10-04 Thread Adam Isaacson
Hi Jack, This is exactly what I have been tasked with. I have a meeting with Grant Hampson (CSIRO) who has the HBM working in RTL to find out more information on the 15th Oct. Maybe we could work together on this? Kind regards, Adam On Mon, 04 Oct 2021, 8:59 PM Jack Hickish, wrote: > Hi CA

Re: [casper] HBM memory

2021-10-04 Thread Jack Hickish
That would be spectacular! Thanks Adam! On Mon, 4 Oct 2021, 21:06 Adam Isaacson, wrote: > Hi Jack, > > This is exactly what I have been tasked with. I have a meeting with Grant > Hampson (CSIRO) who has the HBM working in RTL to find out more information > on the 15th Oct. > > Maybe we could wo

Re: [casper] HBM memory

2021-10-04 Thread Adam Isaacson
Great, I will be in touch :). Kind regards, Adam On Mon, 04 Oct 2021, 10:10 PM Jack Hickish, wrote: > That would be spectacular! > > Thanks Adam! > > On Mon, 4 Oct 2021, 21:06 Adam Isaacson, wrote: > >> Hi Jack, >> >> This is exactly what I have been tasked with. I have a meeting with Grant >

Re: [casper] HBM memory

2021-10-05 Thread Mitch Burnett
Hi Jack, Adam, Benjamin, I hope you do not mind me chime in a bit on the block diagram/IPI/RTL discussion a bit. As you point out Jack, handling IPI/block designs in the toolflow was clunky. But, adding RFSoC to the toolflow to fully support the platform for any board with the part and add the

Re: [casper] HBM memory

2021-10-05 Thread Benjamin H Hlophe
Hi Adam, Yes one can generate a TCL script from Vivado to automate the IPI block regeneration very easily. My application was to do an image processing system that uses the HBM for image buffering and use the XDMA/QDMA to transfer data to and from the FPGA to an NVidia Quadro GPU (For more GPG

Re: [casper] HBM memory

2021-10-06 Thread Adam Isaacson
Hi John, Jack, Benjamin and Mitch, Thanks for all this information. I was just thinking of your RFSOC parameterized yellow block yesterday Mitch. I am happy to have your expertise too. We are not using Vitis for now (we are creating our own DFX partition/static shell), but we will have the capabil