On Thu, May 31, 2018 at 10:48 PM, Jim Brain via cctalk <
cctalk@classiccmp.org> wrote:
> I agree this is very specific, but I thought perhaps someone could help.
>
> As I look at the '09 datasheets, I can't tell when the data lines become
> valid on a write cycle.
>
In the MC68x09E datasheet,
I agree this is very specific, but I thought perhaps someone could help.
As I look at the '09 datasheets, I can't tell when the data lines become
valid on a write cycle.
I ask because I have created a few projects that place themselves
between the CPU and the CPU socket (CPLD based).
To
