> It includes a table which says which chip each bit in the memory is
> stored in
Oh, there's an entry (well, actually two) missing from the table, which is the
parity bits (2; byte parity); I'll work them out and add them. (I know, by
elimination, which two columns of chips are the parit
On Sat, Mar 14, 2020 at 2:12 PM Noel Chiappa via cctalk <
cctalk@classiccmp.org> wrote:
> the MSV11-Q
> sends a 'write' signal to _all_ the banks, and selects the one to
> _actually_
> use by use of the RAS signal.
>
[...]
> Has anyone else seen this trick used anywhere else?
>
Yes, that's very
Yes very common with Dram arrays.
Similar to write enable on Chipselect for Sram arrays.
Allison
On Sat, Mar 14, 2020 at 4:20 PM Chris Zach via cctalk
wrote:
> Noel, you're incredible! Thanks for fuzzing this out, I've been working
> on chiming clocks as of late and put this board on the back
Noel, you're incredible! Thanks for fuzzing this out, I've been working
on chiming clocks as of late and put this board on the back burner, but
with this swapping out the bad chip should be a piece of cake.
Thank you again!
CZ
On 3/14/2020 4:12 PM, Noel Chiappa via cctalk wrote:
So, a while b
So, a while back someone had a broken MSV11-Q QBUS memory card, and needed
info on them. I said I'd provide same, but then got distracted. Well, I
finally got to it, and it's been added to the CHW page for them:
https://gunkies.org/wiki/MSV11-Q_QBUS_memory
It includes a table which says which c
