[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Pierre van Houtryve via cfe-commits
https://github.com/Pierre-vh approved this pull request. LGTM if a kill switch is added, I would wait a day more before landing in case anyone else has concerns https://github.com/llvm/llvm-project/pull/93362 ___ cfe-commits mailing list cfe-commits@l

[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Pierre van Houtryve via cfe-commits
@@ -992,6 +993,8 @@ void AMDGPUPassConfig::addIRPasses() { if (isPassEnabled(EnableImageIntrinsicOptimizer)) addPass(createAMDGPUImageIntrinsicOptimizerPass(&TM)); + addPass(createExpandVariadicsPass(ExpandVariadicsMode::Lowering)); Pierre-vh wrote: Pl

[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Pierre van Houtryve via cfe-commits
https://github.com/Pierre-vh edited https://github.com/llvm/llvm-project/pull/93362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Enable LLDB tests in Linux pre-merge CI (PR #94208)

2024-06-05 Thread Dmitry Vasilyev via cfe-commits
slydiman wrote: We have configured few buildbots for cross lldb tests with Windows x86_64, Linux x86_64 hosts and Linux Aarch64 targets. Our main setup is Windows host and currently it is 100% green. We still have a number of local patches. The biggest changes are related to Makefile.rules to

[clang] [clang][Interp] Member Pointers (PR #91303)

2024-06-05 Thread Timm Baeder via cfe-commits
https://github.com/tbaederr updated https://github.com/llvm/llvm-project/pull/91303 >From 0f047f686ac69549834bfbfdecaa6383c6ab5305 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Timm=20B=C3=A4der?= Date: Wed, 10 Apr 2024 16:42:36 +0200 Subject: [PATCH] Memberpointers --- clang/lib/AST/CMakeLists.tx

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread Pengcheng Wang via cfe-commits
https://github.com/wangpc-pp unassigned https://github.com/llvm/llvm-project/pull/94578 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread Pengcheng Wang via cfe-commits
https://github.com/wangpc-pp unassigned https://github.com/llvm/llvm-project/pull/94578 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread Pengcheng Wang via cfe-commits
https://github.com/wangpc-pp ready_for_review https://github.com/llvm/llvm-project/pull/94578 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread Pengcheng Wang via cfe-commits
https://github.com/wangpc-pp edited https://github.com/llvm/llvm-project/pull/94578 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread Pengcheng Wang via cfe-commits
https://github.com/wangpc-pp updated https://github.com/llvm/llvm-project/pull/94578 >From 57c914eaefa7e59aa51a2b1e730fe1b7d6d10e57 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Thu, 6 Jun 2024 13:48:34 +0800 Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?= =?

[clang] [clang-format][NFC] Remove an else after a return statement (PR #94548)

2024-06-05 Thread Owen Pan via cfe-commits
owenca wrote: It means "No Functional Change". See [here](https://llvm.org/docs/Lexicon.html#n). https://github.com/llvm/llvm-project/pull/94548 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cf

[clang] [llvm] [NVPTX] Revamp NVVMIntrRange pass (PR #94422)

2024-06-05 Thread Nikita Popov via cfe-commits
@@ -139,24 +138,23 @@ define ptx_device i32 @test_ctaid_w() { define ptx_device i32 @test_nctaid_y() { ; CHECK: mov.u32 %r{{[0-9]+}}, %nctaid.y; -; RANGE: call i32 @llvm.nvvm.read.ptx.sreg.nctaid.y(), !range ![[GRID_SIZE_YZ:[0-9]+]] +; RANGE: call range(i32 1, 65536) i32 @llv

[clang] [clang] Implement a bitwise_copyable builtin type trait. (PR #86512)

2024-06-05 Thread A. Jiang via cfe-commits
frederick-vs-ja wrote: IIUC this intrinsic is unrelated to assignment operators. Do you have any plan for `__is_bitwise_assignable`, which should determine whether the assignment operator equivalently copies the value representation, possibly modulo the vptrs? ```C++ struct Cat {}; // bitwise

[clang] [PowerPC] Support -mno-red-zone option (PR #94581)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang-driver Author: Qiu Chaofan (ecnelises) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/94581.diff 2 Files Affected: - (modified) clang/lib/Driver/ToolChains/Clang.cpp (+3) - (modified) clang/test/Driver/flags.c (+3) ``

[clang] [PowerPC] Support -mno-red-zone option (PR #94581)

2024-06-05 Thread Qiu Chaofan via cfe-commits
https://github.com/ecnelises created https://github.com/llvm/llvm-project/pull/94581 None >From 4e078099d8e15fd984ef38435d6f792bbb3d754c Mon Sep 17 00:00:00 2001 From: Qiu Chaofan Date: Thu, 6 Jun 2024 14:06:48 +0800 Subject: [PATCH] [PowerPC] Support -mno-red-zone option --- clang/lib/Drive

[clang] [C++20] [Modules] [Itanium ABI] Generate the vtable in the module unit of dynamic classes (PR #75912)

2024-06-05 Thread Chuanqi Xu via cfe-commits
@@ -1185,6 +1190,21 @@ bool CodeGenVTables::isVTableExternal(const CXXRecordDecl *RD) { TSK == TSK_ExplicitInstantiationDefinition) return false; + // Itanium C++ ABI [5.2.3]: + // Virtual tables for dynamic classes are emitted as follows: + // + // - If the cla

[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)

2024-06-05 Thread via cfe-commits
https://github.com/heiher closed https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 46edc02 - [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (#93814)

2024-06-05 Thread via cfe-commits
Author: hev Date: 2024-06-06T14:05:56+08:00 New Revision: 46edc02eaac81bfdace3e1f906751cad114790da URL: https://github.com/llvm/llvm-project/commit/46edc02eaac81bfdace3e1f906751cad114790da DIFF: https://github.com/llvm/llvm-project/commit/46edc02eaac81bfdace3e1f906751cad114790da.diff LOG: [Loo

[clang] [C++20] [Modules] [Itanium ABI] Generate the vtable in the module unit of dynamic classes (PR #75912)

2024-06-05 Thread Chuanqi Xu via cfe-commits
@@ -3239,6 +3239,12 @@ bool ASTReader::isConsumerInterestedIn(Decl *D) { if (ES->hasExternalDefinitions(D) == ExternalASTSource::EK_Never) return true; + // The dynamic class defined in a named module is interesting. + // The code generator needs to emit its vtable

[clang] [C++20] [Modules] [Itanium ABI] Generate the vtable in the module unit of dynamic classes (PR #75912)

2024-06-05 Thread Chuanqi Xu via cfe-commits
https://github.com/ChuanqiXu9 updated https://github.com/llvm/llvm-project/pull/75912 >From cf8be3c418dde67b74d4a5a4ea98a33f0e2fbd72 Mon Sep 17 00:00:00 2001 From: Chuanqi Xu Date: Tue, 19 Dec 2023 17:00:59 +0800 Subject: [PATCH 1/2] [C++20] [Modules] [Itanium ABI] Generate the vtable in the m

[clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)

2024-06-05 Thread Shao-Ce SUN via cfe-commits
https://github.com/sunshaoce edited https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Shao-Ce SUN via cfe-commits
@@ -381,3 +381,14 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; + +

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Shao-Ce SUN via cfe-commits
https://github.com/sunshaoce updated https://github.com/llvm/llvm-project/pull/94564 >From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001 From: Shao-Ce SUN Date: Thu, 6 Jun 2024 12:05:33 +0800 Subject: [PATCH 1/3] [RISCV] Add processor definition for Spacemit-K1 --- clang/t

[clang] [clang-format][NFC] Remove an else after a return statement (PR #94548)

2024-06-05 Thread via cfe-commits
khufu1 wrote: hi @owenca ,mind telling me what NFC stand for ? https://github.com/llvm/llvm-project/pull/94548 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Mark Zhuang via cfe-commits
zqb-all wrote: > Spacemit K1 is the name of the product/SoC or whatever you call it. The > processor definitions in the RISCV backend are focusing on the CPU core. For > Spacemit K1, the name of its core should be `X60`? I don't know…… Yes,core is x60: https://www.spacemit.com/spacemit-x60-co

[clang] [clang-repl] Lay the foundation of pretty printing for C. (PR #89811)

2024-06-05 Thread Vassil Vassilev via cfe-commits
https://github.com/vgvassilev updated https://github.com/llvm/llvm-project/pull/89811 >From 0c1c53e7d12bf8398c1a18dca2fa472a1b7acb3f Mon Sep 17 00:00:00 2001 From: Vassil Vassilev Date: Tue, 23 Apr 2024 19:33:00 + Subject: [PATCH] [clang-repl] Lay the foundation of pretty printing for C. -

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread Pengcheng Wang via cfe-commits
https://github.com/wangpc-pp converted_to_draft https://github.com/llvm/llvm-project/pull/94578 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Pengcheng Wang (wangpc-pp) Changes `riscv_atomics.h` contains all builtins for atomics. --- Patch is 26.60 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/94578.diff 14 Files Affecte

[clang] [llvm] [RISCV] Add riscv_atomics.h and Zawrs/Zalrsc builtins (PR #94578)

2024-06-05 Thread Pengcheng Wang via cfe-commits
https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/94578 `riscv_atomics.h` contains all builtins for atomics. >From 57c914eaefa7e59aa51a2b1e730fe1b7d6d10e57 Mon Sep 17 00:00:00 2001 From: Wang Pengcheng Date: Thu, 6 Jun 2024 13:48:34 +0800 Subject: [PATCH] =?UTF-8?

[clang] [Clang][AMDGPU] Add builtins for instrinsic `llvm.amdgcn.raw.buffer.store` (PR #94576)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Shilei Tian (shiltian) Changes --- Patch is 25.58 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/94576.diff 4 Files Affected: - (modified) clang/include/clang/Basic/BuiltinsAMDGPU.d

[clang] [Clang][AMDGPU] Add builtins for instrinsic `llvm.amdgcn.raw.buffer.store` (PR #94576)

2024-06-05 Thread Shilei Tian via cfe-commits
https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/94576 None >From c874a4d69d472a83dfcd11e8c07518e4d216b725 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Thu, 6 Jun 2024 01:46:17 -0400 Subject: [PATCH] [Clang][AMDGPU] Add builtins for instrinsic `llvm.amdgcn.raw

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Zhijin Zeng via cfe-commits
zengdage wrote: > Spacemit K1 is the name of the product/SoC or whatever you call it. The > processor definitions in the RISCV backend are focusing on the CPU core. For > Spacemit K1, the name of its core should be `X60`? I don't know…… @sunshaoce Hi, the `Spacemit-K1` is the SoC name and the

[clang-tools-extra] [clangd] Fix crash with null check for Token at Loc (PR #94528)

2024-06-05 Thread kadir çetinkaya via cfe-commits
@@ -1354,6 +1354,8 @@ maybeFindIncludeReferences(ParsedAST &AST, Position Pos, ReferencesResult::Reference Result; const auto *Token = AST.getTokens().spelledTokenAt(Loc); +if (!Token) kadircet wrote: it's a little bit hard to see what

[clang-tools-extra] [clangd] Fix crash with null check for Token at Loc (PR #94528)

2024-06-05 Thread kadir çetinkaya via cfe-commits
https://github.com/kadircet edited https://github.com/llvm/llvm-project/pull/94528 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang-tools-extra] [clangd] Fix crash with null check for Token at Loc (PR #94528)

2024-06-05 Thread kadir çetinkaya via cfe-commits
https://github.com/kadircet requested changes to this pull request. https://github.com/llvm/llvm-project/pull/94528 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][C++23] update constexpr diagnostics for missing return statements per P2448 (PR #94123)

2024-06-05 Thread Oleksandr T. via cfe-commits
https://github.com/a-tarasyuk updated https://github.com/llvm/llvm-project/pull/94123 >From 90eeafc82ee08129c2d290e6382f42ec89680049 Mon Sep 17 00:00:00 2001 From: Oleksandr T Date: Sun, 2 Jun 2024 00:07:35 +0300 Subject: [PATCH 1/3] feat(92583): [C++23] update constexpr diagnostics for missin

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Pengcheng Wang via cfe-commits
@@ -381,3 +381,14 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; + +

[clang] [clang] Implement a bitwise_copyable builtin type trait. (PR #86512)

2024-06-05 Thread Haojian Wu via cfe-commits
https://github.com/hokein closed https://github.com/llvm/llvm-project/pull/86512 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] f6c1e65 - [clang] Implement a __is_bitwise_cloneable builtin type trait. (#86512)

2024-06-05 Thread via cfe-commits
Author: Haojian Wu Date: 2024-06-06T07:28:02+02:00 New Revision: f6c1e65ddfa9e1a07919104be543a1f9eccbb519 URL: https://github.com/llvm/llvm-project/commit/f6c1e65ddfa9e1a07919104be543a1f9eccbb519 DIFF: https://github.com/llvm/llvm-project/commit/f6c1e65ddfa9e1a07919104be543a1f9eccbb519.diff LO

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Shao-Ce SUN via cfe-commits
@@ -381,3 +381,32 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; + +

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Shao-Ce SUN via cfe-commits
https://github.com/sunshaoce updated https://github.com/llvm/llvm-project/pull/94564 >From 363e29385277c049bc91a86e76ff6f6ae70ceaa9 Mon Sep 17 00:00:00 2001 From: Shao-Ce SUN Date: Thu, 6 Jun 2024 12:05:33 +0800 Subject: [PATCH 1/2] [RISCV] Add processor definition for Spacemit-K1 --- clang/t

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Pengcheng Wang via cfe-commits
wangpc-pp wrote: Spacemit K1 is the name of the product/SoC or whatever you call it. The processor definitions in the RISCV backend are focusing on the CPU core. For Spacemit K1, its name should be `X60`? I don't know…… https://github.com/llvm/llvm-project/pull/94564 ___

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Shao-Ce SUN via cfe-commits
https://github.com/sunshaoce edited https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Yingwei Zheng via cfe-commits
@@ -381,3 +381,32 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; + +

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Yingwei Zheng via cfe-commits
dtcxzyw wrote: cc @zengdage https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Yingwei Zheng via cfe-commits
https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

2024-06-05 Thread Kohei Asano via cfe-commits
khei4 wrote: I added more coarse braces options. I'm grad if you take a look ;) https://github.com/llvm/llvm-project/pull/93634 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

2024-06-05 Thread Kohei Asano via cfe-commits
https://github.com/khei4 ready_for_review https://github.com/llvm/llvm-project/pull/93634 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

2024-06-05 Thread Kohei Asano via cfe-commits
https://github.com/khei4 updated https://github.com/llvm/llvm-project/pull/93634 >From 4cdd7bd2a916740f886939d1ec0395b5915eb3c2 Mon Sep 17 00:00:00 2001 From: Kohei Asano Date: Mon, 3 Jun 2024 09:15:44 +0900 Subject: [PATCH] [clang-format] add an option to insert a space only for empty braces

[clang] [clang-format][NFC] Remove an else after a return statement (PR #94548)

2024-06-05 Thread Owen Pan via cfe-commits
https://github.com/owenca edited https://github.com/llvm/llvm-project/pull/94548 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-format] remove redundant else statement (PR #94548)

2024-06-05 Thread Owen Pan via cfe-commits
https://github.com/owenca approved this pull request. https://github.com/llvm/llvm-project/pull/94548 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Shao-Ce SUN (sunshaoce) Changes Spacemit-k1 is a new 8-core CPU that supports RVV 1.0, and it is now integrated into the BPi-F3 development board. Through [ruapo](https://github.com/nihui/ruapu) detection, this is the march inf

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Shao-Ce SUN (sunshaoce) Changes Spacemit-k1 is a new 8-core CPU that supports RVV 1.0, and it is now integrated into the BPi-F3 development board. Through [ruapo](https://github.com/nihui/ruapu) detection, this is the march information

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

2024-06-05 Thread Shao-Ce SUN via cfe-commits
https://github.com/sunshaoce created https://github.com/llvm/llvm-project/pull/94564 Spacemit-k1 is a new 8-core CPU that supports RVV 1.0, and it is now integrated into the BPi-F3 development board. Through [ruapo](https://github.com/nihui/ruapu) detection, this is the march information of

[clang] [clang-tools-extra] [libcxx] Reland "[clang] Enable sized deallocation by default in C++14 onwards" (PR #90373)

2024-06-05 Thread Mike Hommey via cfe-commits
glandium wrote: Yes https://github.com/llvm/llvm-project/pull/90373 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [serialization] no transitive decl change (PR #92083)

2024-06-05 Thread Chuanqi Xu via cfe-commits
ChuanqiXu9 wrote: I've fixed the lldb failure and resent https://github.com/llvm/llvm-project/commit/97c866f6c86456b3316006e6beff47e68a81c00a. https://github.com/llvm/llvm-project/pull/92083 ___ cfe-commits mailing list cfe-commits@lists.llvm.org ht

[clang] 97c866f - [serialization] no transitive decl change (#92083)

2024-06-05 Thread Chuanqi Xu via cfe-commits
Author: Chuanqi Xu Date: 2024-06-06T11:51:05+08:00 New Revision: 97c866f6c86456b3316006e6beff47e68a81c00a URL: https://github.com/llvm/llvm-project/commit/97c866f6c86456b3316006e6beff47e68a81c00a DIFF: https://github.com/llvm/llvm-project/commit/97c866f6c86456b3316006e6beff47e68a81c00a.diff LO

[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

2024-06-05 Thread Kohei Asano via cfe-commits
https://github.com/khei4 updated https://github.com/llvm/llvm-project/pull/93634 >From 1a953e35c2996e31c526e0caf0bbbecaf13c1c63 Mon Sep 17 00:00:00 2001 From: Kohei Asano Date: Mon, 3 Jun 2024 09:15:44 +0900 Subject: [PATCH] [clang-format] add an option to insert a space only for empty braces

[clang] [clang-format] add an option to insert a space only for non-code block empty braces, not for empty parentheses (PR #93634)

2024-06-05 Thread Kohei Asano via cfe-commits
https://github.com/khei4 updated https://github.com/llvm/llvm-project/pull/93634 >From c0138dfe4f2cf3d9925fac46b3ba7d9a9963820a Mon Sep 17 00:00:00 2001 From: Kohei Asano Date: Mon, 3 Jun 2024 09:15:44 +0900 Subject: [PATCH] [clang-format] add an option to insert a space only for empty braces

[clang] [clang-tools-extra] [libcxx] Reland "[clang] Enable sized deallocation by default in C++14 onwards" (PR #90373)

2024-06-05 Thread Pengcheng Wang via cfe-commits
wangpc-pp wrote: > Filed https://gitlab.kitware.com/cmake/cmake/-/issues/26031 So this is a cmake bug, not clang's, right? https://github.com/llvm/llvm-project/pull/90373 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[clang] [clang-format] Fix a bug in `AlignAfterOpenBracket: DontAlign` (PR #94561)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang-format Author: Owen Pan (owenca) Changes Fixes #94555. --- Full diff: https://github.com/llvm/llvm-project/pull/94561.diff 2 Files Affected: - (modified) clang/lib/Format/ContinuationIndenter.cpp (+1-1) - (modified) clang/unittests/Format/Form

[clang] [clang-format] Fix a bug in `AlignAfterOpenBracket: DontAlign` (PR #94561)

2024-06-05 Thread Owen Pan via cfe-commits
https://github.com/owenca created https://github.com/llvm/llvm-project/pull/94561 Fixes #94555. >From f5a4cd0df1df390166adb8400e21894a0f2db18f Mon Sep 17 00:00:00 2001 From: Owen Pan Date: Wed, 5 Jun 2024 19:18:19 -0700 Subject: [PATCH] [clang-format] Fix a bug in `AlignAfterOpenBracket: Dont

[clang] [llvm] [clang] Reland Add tanf16 builtin and support for tan constrained intrinsic (PR #94559)

2024-06-05 Thread Farzon Lotfi via cfe-commits
farzonl wrote: @ilovepi I minimised the failing issue from: https://fuchsia.googlesource.com/fuchsia/+/refs/heads/main/src/graphics/lib/compute/spinel/ext/transform_stack/transform_stack.c to: ```cpp #include #include #define SPN_TRANSFORM_STACK_TAN(x_) tanf(x_) float spinel_transform_stac

[clang] [clang-format] fix incorrectly indents lambda trailing return (PR #94560)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang-format Author: None (c8ef) Changes close: #94181 --- Full diff: https://github.com/llvm/llvm-project/pull/94560.diff 2 Files Affected: - (modified) clang/lib/Format/ContinuationIndenter.cpp (+5) - (modified) clang/unittests/Format/FormatTest.c

[clang] [clang-format] fix incorrectly indents lambda trailing return (PR #94560)

2024-06-05 Thread via cfe-commits
https://github.com/c8ef created https://github.com/llvm/llvm-project/pull/94560 close: #94181 >From 624e74b3066930a5a2bb15d6c0b2ddb4f94d3b79 Mon Sep 17 00:00:00 2001 From: c8ef Date: Thu, 6 Jun 2024 10:44:57 +0800 Subject: [PATCH] fix incorrectly indents lambda trailing return --- clang/lib/F

[clang] [llvm] [clang] Reland Add tanf16 builtin and support for tan constrained intrinsic (PR #94559)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-backend-x86 @llvm/pr-subscribers-clang Author: Farzon Lotfi (farzonl) Changes Relanding this PR now that https://github.com/llvm/llvm-project/pull/90503 has merged. with `FTAN` landing in [TargetLoweringBase.cpp:L1021](https://github.com/llvm/llvm-proj

[clang] [llvm] [clang] Reland Add tanf16 builtin and support for tan constrained intrinsic (PR #94559)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-llvm-ir Author: Farzon Lotfi (farzonl) Changes Relanding this PR now that https://github.com/llvm/llvm-project/pull/90503 has merged. with `FTAN` landing in [TargetLoweringBase.cpp:L1021](https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/

[clang] [llvm] [clang] Reland Add tanf16 builtin and support for tan constrained intrinsic (PR #94559)

2024-06-05 Thread Farzon Lotfi via cfe-commits
https://github.com/farzonl created https://github.com/llvm/llvm-project/pull/94559 Relanding this PR now that https://github.com/llvm/llvm-project/pull/90503 has merged. with `FTAN` landing in [TargetLoweringBase.cpp:L1021](https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/Target

[clang] [serialization] no transitive decl change (PR #92083)

2024-06-05 Thread Chuanqi Xu via cfe-commits
ChuanqiXu9 wrote: > Maybe you can run individual tests with lit but generally I use `lldb-dotest` > instead: > > ``` > ./bin/lldb-dotest.py -p TestTemplateWithSameArg.py > ``` > > (you only need the filename) Thanks. Reproduced. But it surprised me that I can't run the commands you mentioned

[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)

2024-06-05 Thread via cfe-commits
https://github.com/wangleiat approved this pull request. Thanks. https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)

2024-06-05 Thread via cfe-commits
wangleiat wrote: > @wangleiat What do you think? I think this is a good start, and we should make i32 truly legal on LoongArch64, just like RISC-V. https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.or

[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)

2024-06-05 Thread via cfe-commits
https://github.com/heiher updated https://github.com/llvm/llvm-project/pull/93814 >From 5667b2c24b6e2b277e9478152ae318c4e01d3d09 Mon Sep 17 00:00:00 2001 From: WANG Rui Date: Wed, 22 May 2024 15:14:28 +0800 Subject: [PATCH 1/2] [LoongArch] Adjust LA64 data layout by using n32:64 in layout stri

[clang-tools-extra] [clang-tidy] Fix crash in readability-container-size-empty (PR #94527)

2024-06-05 Thread Congcong Cai via cfe-commits
https://github.com/HerrCai0907 approved this pull request. https://github.com/llvm/llvm-project/pull/94527 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] Enable unguarded availability diagnostic on instantiated template functions (PR #91699)

2024-06-05 Thread Chris B via cfe-commits
llvm-beanz wrote: @nico, am I correct to assume those aren't false positives, just a bunch of places that didn't warn before? https://github.com/llvm/llvm-project/pull/91699 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.or

[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)

2024-06-05 Thread Lu Weining via cfe-commits
@@ -5368,8 +5368,8 @@ std::string llvm::UpgradeDataLayoutString(StringRef DL, StringRef TT) { return DL.empty() ? std::string("G1") : (DL + "-G1").str(); } - if (T.isRISCV64()) { -// Make i32 a native type for 64-bit RISC-V. + if (T.isRISCV64() || T.isLoongArch64(

[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)

2024-06-05 Thread Lu Weining via cfe-commits
https://github.com/SixWeining commented: @wangleiat What do you think? https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LoongArch] Adjust LA64 data layout by using n32:64 in layout string (PR #93814)

2024-06-05 Thread Lu Weining via cfe-commits
https://github.com/SixWeining edited https://github.com/llvm/llvm-project/pull/93814 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang-format] Don't format comments in SkipMacroDefinitionBody (PR #94425)

2024-06-05 Thread Owen Pan via cfe-commits
https://github.com/owenca closed https://github.com/llvm/llvm-project/pull/94425 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 798f201 - [clang-format] Don't format comments in SkipMacroDefinitionBody (#94425)

2024-06-05 Thread via cfe-commits
Author: Owen Pan Date: 2024-06-05T17:57:36-07:00 New Revision: 798f2019a2fb608450c5ad5dc261d6496cf1eb15 URL: https://github.com/llvm/llvm-project/commit/798f2019a2fb608450c5ad5dc261d6496cf1eb15 DIFF: https://github.com/llvm/llvm-project/commit/798f2019a2fb608450c5ad5dc261d6496cf1eb15.diff LOG:

[clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)

2024-06-05 Thread Alex Voicu via cfe-commits
@@ -56,6 +56,10 @@ static std::string computeDataLayout(const Triple &TT) { if (Arch == Triple::spirv32) return "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-" "v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"; + if (TT.getVendor() == Triple::VendorType::AMD

[clang] [llvm] [Driver] Rearrange some Apple version testing (PR #94514)

2024-06-05 Thread Fangrui Song via cfe-commits
@@ -0,0 +1,31 @@ +// Test triple manipulations. + +// RUN: %clang -### -c %s \ +// RUN: -target i386-apple-darwin10 -mappletvsimulator-version-min=9.0 -arch x86_64 2>&1 | \ MaskRay wrote: Perhaps 2-space indentation, which is much more common. (`-target ` h

[clang] [clang-tools-extra] [libcxx] Reland "[clang] Enable sized deallocation by default in C++14 onwards" (PR #90373)

2024-06-05 Thread Mike Hommey via cfe-commits
glandium wrote: Filed https://gitlab.kitware.com/cmake/cmake/-/issues/26031 https://github.com/llvm/llvm-project/pull/90373 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

2024-06-05 Thread via cfe-commits
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff bd815a54899d7fa83f6fb49d86c417e1e2e4d2ef 3d5c61a78e91ecb379a2bfac71988eaf8e5cd9cd --

[clang] [clang-tools-extra] [libcxx] Reland "[clang] Enable sized deallocation by default in C++14 onwards" (PR #90373)

2024-06-05 Thread Mike Hommey via cfe-commits
glandium wrote: There is something wrong going on with cmake: STR: - Download [testcase.zip](https://github.com/user-attachments/files/15597940/testcase.zip) - Unzip it (it contains ClangRepl.cpp.obj and exports.def.objs) - Run `cmake -E __create_def exports.def exports.def.objs --nm=/path/to/ll

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu @llvm/pr-subscribers-clang Author: Johannes Doerfert (jdoerfert) Changes Through the new `-foffload-via-llvm` flag, CUDA kernels can now be lowered to the LLVM/Offload API. On the Clang side, this is simply done by using the OpenMP offload

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

2024-06-05 Thread Johannes Doerfert via cfe-commits
https://github.com/jdoerfert created https://github.com/llvm/llvm-project/pull/94549 Through the new `-foffload-via-llvm` flag, CUDA kernels can now be lowered to the LLVM/Offload API. On the Clang side, this is simply done by using the OpenMP offload toolchain and emitting calls to `llvm*` func

[clang] [clang-format] remove redundant else statement (PR #94548)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang-format Author: Nour (khufu1) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/94548.diff 1 Files Affected: - (modified) clang/tools/clang-format/ClangFormat.cpp (+1-2) ``diff diff --git a/clang/tools/clang-format/Cla

[clang] [clang-format] remove redundant else statement (PR #94548)

2024-06-05 Thread via cfe-commits
github-actions[bot] wrote: Thank you for submitting a Pull Request (PR) to the LLVM Project! This PR will be automatically labeled and the relevant teams will be notified. If you wish to, you can add reviewers by using the "Reviewers" section on this page. If this is not working for you, it

[clang] [clang-format] remove redundant else statement (PR #94548)

2024-06-05 Thread via cfe-commits
https://github.com/khufu1 created https://github.com/llvm/llvm-project/pull/94548 None >From bb9a264b2cb4f0063abd51a15be75c6f0ca4ae08 Mon Sep 17 00:00:00 2001 From: Nour Date: Thu, 6 Jun 2024 03:15:04 +0300 Subject: [PATCH] remove redundant else statement --- clang/tools/clang-format/ClangFo

[clang] Enable unguarded availability diagnostic on instantiated template functions (PR #91699)

2024-06-05 Thread Nico Weber via cfe-commits
nico wrote: Any chance to put these behind a subgroup? This now fires in a bunch of places where it didn't before. https://github.com/llvm/llvm-project/pull/91699 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/m

[clang] [llvm] [Driver] Rearrange some Apple version testing (PR #94514)

2024-06-05 Thread Jon Roelofs via cfe-commits
https://github.com/jroelofs approved this pull request. https://github.com/llvm/llvm-project/pull/94514 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang] fix(92755): clang/include/clang/AST/Redeclarable.h: 4 * Function parameter should be passed by const reference (PR #92963)

2024-06-05 Thread Oleksandr T. via cfe-commits
https://github.com/a-tarasyuk updated https://github.com/llvm/llvm-project/pull/92963 >From f33697ce241213136a8d34c2cc32c68f8f827d6a Mon Sep 17 00:00:00 2001 From: Oleksandr T Date: Tue, 21 May 2024 22:56:06 +0300 Subject: [PATCH] fix(92755): use const references for operator== and operator!=

[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Joseph Huber via cfe-commits
@@ -8,10 +8,15 @@ add_custom_target(libc-long-running-tests) add_subdirectory(UnitTest) -if(LIBC_TARGET_OS_IS_GPU AND jhuber6 wrote: Done https://github.com/llvm/llvm-project/pull/93362 ___ cfe-commits mailing lis

[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Jon Chesterfield via cfe-commits
JonChesterfield wrote: If there's no va_start and we're optimising there's no work to do. Otherwise when lowering we still transform declarations (which have no basic blocks) and calls to unknown pointers, so that separate compilation works. That's why knowing it's the whole program would be u

[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Joseph Huber via cfe-commits
jhuber6 wrote: > Early exit on lack of va_start will be incorrect in the lowering case, which > is the only one enabled by default. I believe existing comments are all > addressed. Figured if there's no `va_start` there's nothing for the pass to do anyway. > Precommit the cmake diagnostic twe

[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Jon Chesterfield via cfe-commits
@@ -8,10 +8,15 @@ add_custom_target(libc-long-running-tests) add_subdirectory(UnitTest) -if(LIBC_TARGET_OS_IS_GPU AND JonChesterfield wrote: This is helpful for me working out why libc isn't running tests but otherwise unrelated to this PR, I'll drop it fro

[clang] [libc] [llvm] [AMDGPU] Implement variadic functions by IR lowering (PR #93362)

2024-06-05 Thread Jon Chesterfield via cfe-commits
JonChesterfield wrote: Early exit on lack of va_start will be incorrect in the lowering case, which is the only one enabled by default. I believe existing comments are all addressed. Precommit the cmake diagnostic tweak sounds good, would you like to land that? https://github.com/llvm/llvm-pro

[clang] fix(93512): skip alignment checks on incomplete types (PR #94542)

2024-06-05 Thread via cfe-commits
llvmbot wrote: @llvm/pr-subscribers-clang Author: Oleksandr T. (a-tarasyuk) Changes Fixes #93512 --- Full diff: https://github.com/llvm/llvm-project/pull/94542.diff 3 Files Affected: - (modified) clang/docs/ReleaseNotes.rst (+2) - (modified) clang/lib/Sema/SemaStmt.cpp (+1-1) - (adde

[clang] fix(93512): skip alignment checks on incomplete types (PR #94542)

2024-06-05 Thread Oleksandr T. via cfe-commits
https://github.com/a-tarasyuk created https://github.com/llvm/llvm-project/pull/94542 Fixes #93512 >From 417093b489f17b0d22701f3c3b990388997c25a0 Mon Sep 17 00:00:00 2001 From: Oleksandr T Date: Thu, 6 Jun 2024 01:55:54 +0300 Subject: [PATCH] fix(93512): skip alignment checks on incomplete typ

[clang] [libclc] [llvm] [AMDGPU] Add a new target gfx1152 (PR #94534)

2024-06-05 Thread Stanislav Mekhanoshin via cfe-commits
@@ -1534,6 +1534,12 @@ def FeatureISAVersion11_5_1 : FeatureSet< FeatureVGPRSingleUseHintInsts, Feature1_5xVGPRs])>; +def FeatureISAVersion11_5_2 : FeatureSet< rampitec wrote: Then I defer review to Jay. https://github.com/llvm/llvm-project/pull/94

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