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>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 1/8] Implement frontend for bcd builtins
---
clang/include/clang/Basi
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https://github.com/llvm/llvm-project/pull/154715
>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 1/6] Implement frontend for bcd builtins
---
clang/include/clang/Basi
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>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 1/3] Implement frontend for bcd builtins
---
clang/include/clang/Basi
https://github.com/AditiRM updated
https://github.com/llvm/llvm-project/pull/154715
>From 20acfd4109a453060f3678e536234de94012f19c Mon Sep 17 00:00:00 2001
From: AditiRM
Date: Thu, 21 Aug 2025 09:40:59 +
Subject: [PATCH 1/2] Implement frontend for bcd builtins
---
clang/include/clang/Basi
https://github.com/AditiRM created
https://github.com/llvm/llvm-project/pull/154715
Support the following BCD format conversion builtins for PowerPC.
- `__builtin_bcdshift` – Shifts a packed decimal value by a specified number of
decimal digits.
- `__builtin_bcdshiftround` – Shifts a packed de
https://github.com/AditiRM updated
https://github.com/llvm/llvm-project/pull/144874
>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/9] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
https://github.com/AditiRM updated
https://github.com/llvm/llvm-project/pull/144874
>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/8] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
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>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/7] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
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https://github.com/llvm/llvm-project/pull/144874
>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/7] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
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@@ -0,0 +1,29 @@
+// NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -O2 -target-cpu pwr9 \
+// RUN: -emit-llvm %s -o - | FileCheck
@@ -580,6 +580,8 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
"isa-v207-instructions")
// P9 Binary-coded decimal (BCD) builtins.
+TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
https://github.com/AditiRM updated
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>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/6] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
@@ -580,6 +580,8 @@ TARGET_BUILTIN(__builtin_ppc_bcdsub_p, "iiV16UcV16Uc", "",
"isa-v207-instructions")
// P9 Binary-coded decimal (BCD) builtins.
+TARGET_BUILTIN(__builtin_ppc_bcdcopysign, "V16UcV16UcV16Uc", "",
https://github.com/AditiRM updated
https://github.com/llvm/llvm-project/pull/144874
>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/5] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
@@ -0,0 +1,40 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
AditiRM wrote:
Following our offline discussion, the test file has been renamed to
**builtins-bcd-format-conversion.ll** for better clarity.
h
@@ -106,6 +106,7 @@ bool SemaPPC::CheckPPCBuiltinFunctionCall(const TargetInfo
&TI,
switch (BuiltinID) {
default:
return false;
+ case PPC::BI__builtin_ppc_bcdsetsign:
AditiRM wrote:
Updated the descriptions and clarified notes for both builtins.
ht
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>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/3] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
https://github.com/AditiRM updated
https://github.com/llvm/llvm-project/pull/144874
>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/2] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
https://github.com/AditiRM updated
https://github.com/llvm/llvm-project/pull/144874
>From 8e287c19723361b0141c7bf9d1de34b145b9782c Mon Sep 17 00:00:00 2001
From: Aditi-Medhane
Date: Thu, 19 Jun 2025 11:04:12 +
Subject: [PATCH 1/2] [PowerPC] Add BCDCOPYSIGN and BCDSETSIGN Instruction
Suppor
@@ -515,6 +515,10 @@ TARGET_BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "",
"power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "", "power9-vector")
+//P9 BCD builtins
+TARGET_BUILT
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https://github.com/AditiRM created
https://github.com/llvm/llvm-project/pull/144874
Support the following BCD format conversion builtins for PowerPC.
- `__builtin_bcdcopysign` – Conversion that returns the decimal value of the
first parameter combined with the sign code of the second parameter
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