[clang] [llvm] [mlir] Move several vector intrinsics out of experimental namespace (PR #88748)

@@ -0,0 +1,46 @@ +; RUN: opt -S < %s | FileCheck %s c-rhodes wrote: ah ok, that makes sense 👍 https://github.com/llvm/llvm-project/pull/88748 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.

[clang] [llvm] [mlir] Move several vector intrinsics out of experimental namespace (PR #88748)

@@ -0,0 +1,46 @@ +; RUN: opt -S < %s | FileCheck %s c-rhodes wrote: this `opt` line can be removed? Likewise for other upgrade tests. https://github.com/llvm/llvm-project/pull/88748 ___ cfe-commits mailing list cfe-com

[clang] [llvm] [mlir] Move several vector intrinsics out of experimental namespace (PR #88748)

https://github.com/c-rhodes approved this pull request. one final comment, otherwise LGTM cheers. https://github.com/llvm/llvm-project/pull/88748 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cf

[clang] [llvm] [mlir] Move several vector intrinsics out of experimental namespace (PR #88748)

https://github.com/c-rhodes edited https://github.com/llvm/llvm-project/pull/88748 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] Move several vector intrinsics out of experimental namespace (PR #88748)

c-rhodes wrote: > Rebased on newer LLVM + forcing to re-run the testing which previously failed > on some not related issues. Not sure if you missed my previous comment but you need to update the `interleave2` intrinsic in MLIR. MLIR doesn't build with this patch which you can see in pre-comm

[clang] [llvm] Move several vector intrinsics out of experimental namespace (PR #88748)

c-rhodes wrote: > I was actually following this patch https://reviews.llvm.org/D127976 which > promoted vector.insert/extract and there was no RFC for it. My understanding > is that these intrinsics are so heavily used in LLVM now so there is no need > to call them experimental, moreover the a

[clang] [llvm] Move several vector intrinsics out of experimental namespace (PR #88748)

c-rhodes wrote: Thanks for patch. We use `interleave2` in MLIR so it'll need updating there as well. I don't know what the policy is for promoting intrinsics from experimental to first-class or if it's documented anywhere (?), but I would expect this to be accompanied with an RFC / announceme

[mlir] [llvm] [clang] [AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (PR #79166)

https://github.com/c-rhodes approved this pull request. https://github.com/llvm/llvm-project/pull/79166 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [mlir] [clang] [AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (PR #79166)

@@ -22,26 +22,32 @@ Below we describe the LLVM IR attributes and their relation to the C/C++ level ACLE attributes: ``aarch64_pstate_sm_enabled`` -is used for functions with ``__attribute__((arm_streaming))`` +is used for functions with ``__arm_streaming`` ``aarch6

[mlir] [clang] [llvm] [AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (PR #79166)

https://github.com/c-rhodes commented: MLIR changes LGTM cheers, just left one comment for something I missed when the preserved attr was added recently. Also, in the commit message the LLVM IR attributes are prefixed with `arm`, should be `aarch64`. https://github.com/llvm/llvm-project/pull/

[clang] [llvm] [mlir] [AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (PR #79166)

@@ -1098,11 +1098,15 @@ LogicalResult ModuleTranslation::convertOneFunction(LLVMFuncOp func) { llvmFunc->addFnAttr("aarch64_pstate_sm_compatible"); if (func.getArmNewZa()) -llvmFunc->addFnAttr("aarch64_pstate_za_new"); - else if (func.getArmSharedZa()) -llvmFun

[clang] [llvm] [mlir] [AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (PR #79166)

https://github.com/c-rhodes edited https://github.com/llvm/llvm-project/pull/79166 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] 7c3cda5 - [AArch64][SVE] Prefer SIMD&FP variant of clast[ab]

Author: Cullen Rhodes Date: 2022-07-13T08:53:36Z New Revision: 7c3cda551ac702de4eb8899180aa715896020d43 URL: https://github.com/llvm/llvm-project/commit/7c3cda551ac702de4eb8899180aa715896020d43 DIFF: https://github.com/llvm/llvm-project/commit/7c3cda551ac702de4eb8899180aa715896020d43.diff LOG:

[clang] 698584f - [IR] Remove unbounded as possible value for vscale_range minimum

Author: Cullen Rhodes Date: 2021-12-07T09:52:21Z New Revision: 698584f89b8f8bd7f6c2d2cd61efb5548857da2a URL: https://github.com/llvm/llvm-project/commit/698584f89b8f8bd7f6c2d2cd61efb5548857da2a DIFF: https://github.com/llvm/llvm-project/commit/698584f89b8f8bd7f6c2d2cd61efb5548857da2a.diff LOG:

[clang] 6c8ff40 - [OptParser] NFC: Remove unused template arg 'name' from bool opt

Author: Cullen Rhodes Date: 2021-09-09T12:04:40Z New Revision: 6c8ff4032e2bcf7dd381633b7e6294f23f0173a9 URL: https://github.com/llvm/llvm-project/commit/6c8ff4032e2bcf7dd381633b7e6294f23f0173a9 DIFF: https://github.com/llvm/llvm-project/commit/6c8ff4032e2bcf7dd381633b7e6294f23f0173a9.diff LOG:

[clang] 9722e8f - [clang] NFC: Remove duplicate DependentSizedMatrixType methods

Author: Cullen Rhodes Date: 2021-09-02T10:46:20Z New Revision: 9722e8ff9eab9ec9c0d8fc0008fd368f93210ba5 URL: https://github.com/llvm/llvm-project/commit/9722e8ff9eab9ec9c0d8fc0008fd368f93210ba5 DIFF: https://github.com/llvm/llvm-project/commit/9722e8ff9eab9ec9c0d8fc0008fd368f93210ba5.diff LOG:

[clang] 58d3f0e - [clang][aarch64] Address various fixed-length SVE vector operations

Author: Cullen Rhodes Date: 2020-10-30T15:10:54Z New Revision: 58d3f0ea497206950d7bcb22b05d161e834e4396 URL: https://github.com/llvm/llvm-project/commit/58d3f0ea497206950d7bcb22b05d161e834e4396 DIFF: https://github.com/llvm/llvm-project/commit/58d3f0ea497206950d7bcb22b05d161e834e4396.diff LOG:

[clang] 9218f92 - [clang][aarch64] ACLE: Support implicit casts between GNU and SVE vectors

Author: Cullen Rhodes Date: 2020-09-17T09:35:30Z New Revision: 9218f9283802b2d1ff33c490761fdb925b1e56d9 URL: https://github.com/llvm/llvm-project/commit/9218f9283802b2d1ff33c490761fdb925b1e56d9 DIFF: https://github.com/llvm/llvm-project/commit/9218f9283802b2d1ff33c490761fdb925b1e56d9.diff LOG:

[clang] cabd60c - [clang][aarch64] Fix mangling of bfloat16 neon vectors

Author: Cullen Rhodes Date: 2020-09-11T10:11:45Z New Revision: cabd60c26b5df34f096a5a915bde3b1d8ee1 URL: https://github.com/llvm/llvm-project/commit/cabd60c26b5df34f096a5a915bde3b1d8ee1 DIFF: https://github.com/llvm/llvm-project/commit/cabd60c26b5df34f096a5a915bde3b1d8ee1.diff LOG:

[clang] 002f5ab - [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

Author: Cullen Rhodes Date: 2020-09-11T09:46:35Z New Revision: 002f5ab3b171c7d9c9ea192b04a5303be78f6e52 URL: https://github.com/llvm/llvm-project/commit/002f5ab3b171c7d9c9ea192b04a5303be78f6e52 DIFF: https://github.com/llvm/llvm-project/commit/002f5ab3b171c7d9c9ea192b04a5303be78f6e52.diff LOG:

[clang] f9091e5 - [clang][aarch64] Drop experimental from __ARM_FEATURE_SVE_BITS macro

Author: Cullen Rhodes Date: 2020-09-03T09:39:37Z New Revision: f9091e56d34fc1a14fe4640b95a691d9ac7afcc4 URL: https://github.com/llvm/llvm-project/commit/f9091e56d34fc1a14fe4640b95a691d9ac7afcc4 DIFF: https://github.com/llvm/llvm-project/commit/f9091e56d34fc1a14fe4640b95a691d9ac7afcc4.diff LOG:

[clang] feed5a7 - [Sema][AArch64] Support arm_sve_vector_bits attribute

Author: Cullen Rhodes Date: 2020-08-27T10:38:32Z New Revision: feed5a7239d8ed0ec9f90775080ce8546bf364df URL: https://github.com/llvm/llvm-project/commit/feed5a7239d8ed0ec9f90775080ce8546bf364df DIFF: https://github.com/llvm/llvm-project/commit/feed5a7239d8ed0ec9f90775080ce8546bf364df.diff LOG:

[clang] 89e61e7 - [Sema][AArch64] Add semantics for arm_sve_vector_bits attribute

Author: Cullen Rhodes Date: 2020-07-22T16:26:23Z New Revision: 89e61e782b7366083efc6a3c8c54602ddf2dfe8b URL: https://github.com/llvm/llvm-project/commit/89e61e782b7366083efc6a3c8c54602ddf2dfe8b DIFF: https://github.com/llvm/llvm-project/commit/89e61e782b7366083efc6a3c8c54602ddf2dfe8b.diff LOG:

[clang] bb160e7 - [Sema][AArch64] Add parsing support for arm_sve_vector_bits attribute

Author: Cullen Rhodes Date: 2020-07-17T10:06:54Z New Revision: bb160e769dbef25fe0aa130c71458a8f686ccf80 URL: https://github.com/llvm/llvm-project/commit/bb160e769dbef25fe0aa130c71458a8f686ccf80 DIFF: https://github.com/llvm/llvm-project/commit/bb160e769dbef25fe0aa130c71458a8f686ccf80.diff LOG:

[clang] e73c3bb - [AArch64][SVE] Add bfloat16 to outstanding tuple vector intrinsics

Author: Cullen Rhodes Date: 2020-06-29T17:00:58Z New Revision: e73c3bb06b5a35d13cf96d574ce3b849c5d3d56d URL: https://github.com/llvm/llvm-project/commit/e73c3bb06b5a35d13cf96d574ce3b849c5d3d56d DIFF: https://github.com/llvm/llvm-project/commit/e73c3bb06b5a35d13cf96d574ce3b849c5d3d56d.diff LOG:

[clang] 1ef75f5 - [AArch64][SVE] clang: Add missing svbfloat16_t tests

Author: Cullen Rhodes Date: 2020-06-29T16:48:53Z New Revision: 1ef75f53e9e6aeb35a1d46798b3063192ee86f0f URL: https://github.com/llvm/llvm-project/commit/1ef75f53e9e6aeb35a1d46798b3063192ee86f0f DIFF: https://github.com/llvm/llvm-project/commit/1ef75f53e9e6aeb35a1d46798b3063192ee86f0f.diff LOG:

[clang] d5fc592 - [AArch64][SVE] Add bfloat16 support to svext intrinsic

Author: Cullen Rhodes Date: 2020-06-29T11:08:38Z New Revision: d5fc592b7c26e96556d2667d2b65a8bd18094a75 URL: https://github.com/llvm/llvm-project/commit/d5fc592b7c26e96556d2667d2b65a8bd18094a75 DIFF: https://github.com/llvm/llvm-project/commit/d5fc592b7c26e96556d2667d2b65a8bd18094a75.diff LOG:

[clang] d45cf91 - [AArch64][SVE2] Guard while intrinsics on scalar bfloat feature macro

Author: Cullen Rhodes Date: 2020-06-26T10:25:42Z New Revision: d45cf9105b5a88ed03382ffbbfcd54b461f1bb23 URL: https://github.com/llvm/llvm-project/commit/d45cf9105b5a88ed03382ffbbfcd54b461f1bb23 DIFF: https://github.com/llvm/llvm-project/commit/d45cf9105b5a88ed03382ffbbfcd54b461f1bb23.diff LOG:

[clang] 05e10ee - [AArch64][SVE2] Add bfloat16 support to whilerw/whilewr intrinsics

Author: Cullen Rhodes Date: 2020-06-24T10:06:31Z New Revision: 05e10ee0aee02dd3ff30f59a0b5e1faa2d5a21a0 URL: https://github.com/llvm/llvm-project/commit/05e10ee0aee02dd3ff30f59a0b5e1faa2d5a21a0 DIFF: https://github.com/llvm/llvm-project/commit/05e10ee0aee02dd3ff30f59a0b5e1faa2d5a21a0.diff LOG:

[clang] fd2c4b8 - [AArch64][SVE] Add bfloat16 support to svlen intrinsic

Author: Cullen Rhodes Date: 2020-06-24T10:05:51Z New Revision: fd2c4b8999322031b6cd555007ca69fd83270958 URL: https://github.com/llvm/llvm-project/commit/fd2c4b8999322031b6cd555007ca69fd83270958 DIFF: https://github.com/llvm/llvm-project/commit/fd2c4b8999322031b6cd555007ca69fd83270958.diff LOG:

[clang] 26502ad - [AArch64][SVE] Add bfloat16 support to perm and select intrinsics

Author: Cullen Rhodes Date: 2020-06-24T10:04:51Z New Revision: 26502ad609222321f6384e3317fc03165c844be1 URL: https://github.com/llvm/llvm-project/commit/26502ad609222321f6384e3317fc03165c844be1 DIFF: https://github.com/llvm/llvm-project/commit/26502ad609222321f6384e3317fc03165c844be1.diff LOG:

[clang] c8fae2b - [AArch64][SVE] Guard svbfloat16_t with feature macro in ACLE

Author: Cullen Rhodes Date: 2020-06-23T10:24:10Z New Revision: c8fae2bb4afed8073096860d23e5759055c9bf88 URL: https://github.com/llvm/llvm-project/commit/c8fae2bb4afed8073096860d23e5759055c9bf88 DIFF: https://github.com/llvm/llvm-project/commit/c8fae2bb4afed8073096860d23e5759055c9bf88.diff LOG:

r373712 - [Driver] NFC: Remove duplicate call to getLibGccType

Author: c-rhodes Date: Fri Oct 4 01:26:37 2019 New Revision: 373712 URL: http://llvm.org/viewvc/llvm-project?rev=373712&view=rev Log: [Driver] NFC: Remove duplicate call to getLibGccType Reviewed By: saugustine Differential Revision: https://reviews.llvm.org/D68380 Modified: cfe/trunk/lib/