https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/154905
>From 2da6e6536dfb80ab9192a9defeb40f529dc79960 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Fri, 22 Aug 2025 15:45:12 +0800
Subject: [PATCH] [NFC][clang] Move simplifyConstraint to TargetInfo.cpp
--
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/154905
The function is shared between traditional CodeGen and [CIR
CodeGen](https://github.com/llvm/llvm-project/pull/154014/files#diff-d5362e34735bb1a32e8d71b2a696febe069baec13dd0535373279edc695ee521R31).
>From 865a3eb
@@ -26,6 +28,98 @@ static AsmFlavor inferFlavor(const CIRGenModule &cgm, const
AsmStmt &s) {
return isa(&s) ? AsmFlavor::x86_intel : gnuAsmFlavor;
}
+// FIXME(cir): This should be a common helper between CIRGen
el-ev wrote:
What about `addVariableConstrain
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/154014
>From 53257acd6f023969a0648315410dc1a9ea54abed Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sun, 17 Aug 2025 20:02:13 +0800
Subject: [PATCH] [CIR] Implement codegen for inline assembly with output
o
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/153546
>From b1b7b10975ecd212405d7f8a7a4021821b95fc7b Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Thu, 14 Aug 2025 15:12:18 +0800
Subject: [PATCH 1/2] [CIR] Implement codegen for inline assembly without in
@@ -0,0 +1,136 @@
+//===--- CIRGenAsm.cpp - Inline Assembly Support for CIR CodeGen -===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/153546
>From b1b7b10975ecd212405d7f8a7a4021821b95fc7b Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Thu, 14 Aug 2025 15:12:18 +0800
Subject: [PATCH 1/2] [CIR] Implement codegen for inline assembly without in
https://github.com/el-ev edited https://github.com/llvm/llvm-project/pull/153546
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https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/153362
>From a5a32a00acc2e66a264afbb8fa4efcce337eadde Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Wed, 13 Aug 2025 13:18:57 +0800
Subject: [PATCH 1/4] [CIR] Add `InlineAsmOp`
---
clang/include/clang/CIR/
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/153362
>From fc90a55f870ef7ac91628f3538121b28616a070f Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Wed, 13 Aug 2025 13:18:57 +0800
Subject: [PATCH 1/4] [CIR] Add `InlineAsmOp`
---
clang/include/clang/CIR/
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/153563
>From e43d3d00a7516d538fcd00b7b5635545739b19b4 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Thu, 14 Aug 2025 18:08:44 +0800
Subject: [PATCH] [clang] constexpr `__builtin_elementwise_{max,min}`
---
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/153563
- Followup of #152294
Added floating point support.
>From 53685d699f856ccd6bf956e43ed4f29f059c6fca Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Thu, 14 Aug 2025 18:08:44 +0800
Subject: [PATCH] [cla
https://github.com/el-ev approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/152497
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@@ -11634,11 +11634,40 @@ bool VectorExprEvaluator::VisitCallExpr(const
CallExpr *E) {
APValue(APSInt(Elt.reverseBits(),
DestEltTy->isUnsignedIntegerOrEnumerationType(;
break;
+ case Builtin::BI__builtin_elementwise_abs:
https://github.com/el-ev requested changes to this pull request.
Looks mostly good, with some nits.
https://github.com/llvm/llvm-project/pull/152497
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@@ -115,6 +115,8 @@ Non-comprehensive list of changes in this release
-
- Added ``__builtin_elementwise_fshl`` and ``__builtin_elementwise_fshr``.
+- Added `__builtin_elementwise_abs`.
el-ev wrote:
It's not "Add
https://github.com/el-ev edited https://github.com/llvm/llvm-project/pull/152497
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@@ -2406,6 +2406,208 @@ OpFoldResult RotateOp::fold(FoldAdaptor adaptor) {
return IntAttr::get(input.getContext(), input.getType(), resultValue);
}
+//===--===//
+// InlineAsmOp
+//===---
@@ -2239,6 +2239,89 @@ def CIR_StackRestoreOp : CIR_Op<"stackrestore"> {
let assemblyFormat = "$ptr attr-dict `:` qualified(type($ptr))";
}
+//===--===//
+// InlineAsmOp
+//===---
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/153362
>From fc90a55f870ef7ac91628f3538121b28616a070f Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Wed, 13 Aug 2025 13:18:57 +0800
Subject: [PATCH 1/3] [CIR] Add `InlineAsmOp`
---
clang/include/clang/CIR/
https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/152294
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@@ -11654,6 +11654,41 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr
*E) {
return Success(APValue(ResultElements.data(), ResultElements.size()), E);
}
+ case Builtin::BI__builtin_elementwise_max:
+ case Builtin::BI__builtin_elementwise_min: {
--
@@ -860,3 +860,19 @@ static_assert(__builtin_elementwise_sub_sat(0U, 1U) == 0U);
static_assert(__builtin_bit_cast(unsigned,
__builtin_elementwise_sub_sat((vector4char){5, 4, 3, 2}, (vector4char){1, 1, 1,
1})) == (LITTLE_END ? 0x01020304 : 0x04030201));
static_assert(__builtin_
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/152294
- Closes #152278
- Part of #51787
This PR adds support for the bulitin elementwise max/min functions for integer
types.
>From fd1bd1ce099a5dd7d06bb38cf5a8af7ff401f146 Mon Sep 17 00:00:00 2001
From: Iris Shi <0..
https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/151790
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https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/151790
>From 12e745a621a7fbd30c0991bf52598455b886f37e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 2 Aug 2025 12:02:49 +0800
Subject: [PATCH 1/4] [clang][diagnostics] Fix fix-it hint parenthesis
place
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/151790
>From 12e745a621a7fbd30c0991bf52598455b886f37e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 2 Aug 2025 12:02:49 +0800
Subject: [PATCH 1/3] [clang][diagnostics] Fix fix-it hint parenthesis
place
@@ -0,0 +1,13 @@
+// RUN: %clang_cc1 -verify -std=c++17 -pedantic-errors %s
+// RUN: cp %s %t
+// RUN: not %clang_cc1 -x c++ -std=c++17 -fixit %t
+// RUN: %clang_cc1 -Wall -pedantic-errors -x c++ -std=c++17 %t
+
+/* This is a test of the various code modification hints that only
+
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/151790
>From 12e745a621a7fbd30c0991bf52598455b886f37e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 2 Aug 2025 12:02:49 +0800
Subject: [PATCH 1/2] [clang][diagnostics] Fix fix-it hint parenthesis
place
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/151790
>From 12e745a621a7fbd30c0991bf52598455b886f37e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 2 Aug 2025 12:02:49 +0800
Subject: [PATCH 1/2] [clang][diagnostics] Fix fix-it hint parenthesis
place
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/151790
- Closes #151787
Insert the right parenthesis one token later to correctly enclose the
expression.
>From 12e745a621a7fbd30c0991bf52598455b886f37e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat,
https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/151682
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https://github.com/llvm/llvm-project/pull/151682
>From fa6335d597488afecfc8532ad3336a821b2bf19e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Fri, 1 Aug 2025 18:08:48 +0800
Subject: [PATCH 1/3] [static analyzer] Fix crash on parenthesized expression
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/151682
>From fa6335d597488afecfc8532ad3336a821b2bf19e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Fri, 1 Aug 2025 18:08:48 +0800
Subject: [PATCH 1/2] [static analyzer] Fix crash on parenthesized expression
@@ -148,6 +148,8 @@ Bug Fixes to Attribute Support
- ``[[nodiscard]]`` is now respected on Objective-C and Objective-C++ methods.
(#GH141504)
+- Fixed a crash in the static analyzer that when the expression in an
+ ``[[assume(expr)]]`` attribute was enclosed in parentheses
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/151682
>From fa6335d597488afecfc8532ad3336a821b2bf19e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Fri, 1 Aug 2025 18:08:48 +0800
Subject: [PATCH 1/2] [static analyzer] Fix crash on parenthesized expression
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/151682
>From fa6335d597488afecfc8532ad3336a821b2bf19e Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Fri, 1 Aug 2025 18:08:48 +0800
Subject: [PATCH] [static analyzer] Fix crash on parenthesized expression in
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/151682
- Closes #151529
`ParenExpr` should be ignored before reaching `ExprEngine::Visit`. Failing to
do so triggers the assertion.
>From efb9dcb3a036b9c28b72bcdb1739aec2c26aa6e0 Mon Sep 17 00:00:00 2001
From: Iris Shi
https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/140337
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el-ev wrote:
> Next time please add more details in the summary, this is key for reviewers
> so that they can digest the PR without leaving for more context. Even in very
> simple PRs it is good to do.
>
> For this one something along the lines of `Parser::ParseUsingDeclaration was
> not that
https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/144286
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https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/144286
>From 6e10acb31f5975aad222bf211bcd61976a1c5108 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 16 Jun 2025 09:37:17 +0800
Subject: [PATCH 1/2] [clang][Parser] Fix crash on malformed using declarati
@@ -0,0 +1,8 @@
+// RUN: %clang_cc1 -fsyntax-only -verify %s
+
+// issue144264
+constexpr void test()
+{
+using TT = struct T[deprecated{};
el-ev wrote:
Updated, thanks!
https://github.com/llvm/llvm-project/pull/144286
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/144286
>From 6e10acb31f5975aad222bf211bcd61976a1c5108 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 16 Jun 2025 09:37:17 +0800
Subject: [PATCH] [clang][Parser] Fix crash on malformed using declaration i
https://github.com/el-ev edited https://github.com/llvm/llvm-project/pull/144286
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https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/144286
>From 45b05320cfe0106a54f31d7d5d5d6ed0e23faff3 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 16 Jun 2025 09:37:17 +0800
Subject: [PATCH 1/2] [clang][Parser] Fix crash on invalid attribute in
con
el-ev wrote:
Added.
https://github.com/llvm/llvm-project/pull/144286
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https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/144286
>From 45b05320cfe0106a54f31d7d5d5d6ed0e23faff3 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 16 Jun 2025 09:37:17 +0800
Subject: [PATCH 1/2] [clang][Parser] Fix crash on invalid attribute in
con
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/144286
>From 4c2a77216656c90ea157403f1fba026f81c4d328 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 16 Jun 2025 09:37:17 +0800
Subject: [PATCH] [clang][Parser] Fix crash on invalid attribute in constexp
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/144286
- Closes #144264
>From 70b7c4140e8991a56275782a282a7a9d9b3be155 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 16 Jun 2025 09:37:17 +0800
Subject: [PATCH] [clang][Parser] Fix crash on invalid att
https://github.com/el-ev approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/144252
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https://github.com/el-ev approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/140612
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https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/140337
>From 935633e4e6b290bbf7f83a559a3cd36c049186c7 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 17 May 2025 10:46:46 +0800
Subject: [PATCH] [Clang][NFC] Use `llvm::sort()`
---
clang/lib/APINotes/A
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/140337
>From 935633e4e6b290bbf7f83a559a3cd36c049186c7 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 17 May 2025 10:46:46 +0800
Subject: [PATCH] [Clang][NFC] Use `llvm::sort()`
---
clang/lib/APINotes/A
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/140337
None
>From 935633e4e6b290bbf7f83a559a3cd36c049186c7 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 17 May 2025 10:46:46 +0800
Subject: [PATCH] [Clang][NFC] Use `llvm::sort()`
---
clang/lib/APIN
https://github.com/el-ev approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/140322
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https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/139508
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el-ev wrote:
### Merge activity
* **May 14, 10:53 PM EDT**:
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/139495)
couldn't merge this PR because it had conflicts with the trunk branch.
https://github.com/llvm/llvm-project/pull/139495
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139508
>From eb15367085a381955140982177e95ad94a645e92 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH 1/3] [RISCV][MC] Add support for Q extension
---
.../Driv
https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/139369
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el-ev wrote:
### Merge activity
* **May 14, 10:50 PM EDT**: A user started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/139369).
https://github.com/llvm/llvm-project/pull/139369
_
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From eb15367085a381955140982177e95ad94a645e92 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH 1/2] [RISCV][MC] Add support for Q extension
---
.../Driv
@@ -599,6 +599,13 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
return;
}
+ if (RISCV::FPR128RegClass.contains(DstReg, SrcReg)) {
el-ev wrote:
I missed it. Removed.
https://github.com/llvm/llvm-project/pull/139369
___
@@ -247,8 +248,21 @@ void
CIRGenModule::emitGlobalFunctionDefinition(clang::GlobalDecl gd,
"function definition with a non-identifier for a name");
return;
}
- cir::FuncType funcType =
- cast(convertType(funcDecl->getType()));
+
+ cir::FuncType funcTy
@@ -599,6 +599,13 @@ void RISCVInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
return;
}
+ if (RISCV::FPR128RegClass.contains(DstReg, SrcReg)) {
el-ev wrote:
I missed it. Removed.
https://github.com/llvm/llvm-project/pull/139369
___
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From eb15367085a381955140982177e95ad94a645e92 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH 1/2] [RISCV][MC] Add support for Q extension
---
.../Driv
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/136854
>From 9e6c30658f628e736567f57589a6534cfe060902 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Thu, 8 May 2025 23:40:15 +0800
Subject: [PATCH 1/2] [CIR] Cleanup support for C functions
---
clang/lib/C
https://github.com/el-ev edited https://github.com/llvm/llvm-project/pull/136854
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@@ -233,6 +233,19 @@ int f8(int *p) {
// OGCG: %[[P2:.*]] = load ptr, ptr %[[P_PTR]], align 8
// OGCG: %[[STAR_P:.*]] = load i32, ptr %[[P2]], align 4
+
+void f9() {}
el-ev wrote:
call to variadic function is NYI
https://github.com/llvm/llvm-project/pull
@@ -291,6 +291,13 @@ def HasStdExtD : Predicate<"Subtarget->hasStdExtD()">,
AssemblerPredicate<(all_of FeatureStdExtD),
"'D' (Double-Precision Floating-Point)">;
+def FeatureStdExtQ
+: RISCVExtension<2, 2, "Quad-Precisio
@@ -198,6 +198,9 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
bool useLoadStorePairs() const;
bool useCCMovInsn() const;
unsigned getFLen() const {
+if (HasStdExtQ)
el-ev wrote:
Removed, thanks.
https://github.com/llvm/llvm-project/pull/
@@ -75,7 +75,7 @@ def ZhinxminZdinxExt: ExtInfo<"_INX", "Zfinx",
?, ?, FPR32INX, FPR64INX, FPR16INX>;
def ZhinxZdinx32Ext : ExtInfo<"_IN32X", "ZdinxGPRPairRV32",
[HasStdExtZhinx, HasStdExtZdinx, IsRV32]
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From d6136a57b911de936202f6136ff9965cc2651f8a Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH 1/2] [RISCV][MC] Add support for Q extension
---
.../Driv
@@ -0,0 +1,151 @@
+//===-- RISCVInstrInfoQ.td - RISC-V 'Q' instructions ---*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -674,6 +681,9 @@ void RISCVInstrInfo::storeRegToStackSlot(MachineBasicBlock
&MBB,
} else if (RISCV::FPR64RegClass.hasSubClassEq(RC)) {
Opcode = RISCV::FSD;
IsScalableVector = false;
+ } else if (RISCV::FPR128RegClass.hasSubClassEq(RC)) {
el-ev wr
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 9a25e249fe060b3d4fcdaef69b664c08c3d2a56d Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH 1/2] [RISCV][MC] Add support for Q extension
---
.../Driv
@@ -147,6 +147,13 @@ def ntl_load : RISCVBuiltin<"void(...)">;
def ntl_store : RISCVBuiltin<"void(...)">;
} // Features = "zihintntl", Attributes = [CustomTypeChecking]
+//===--===//
+// Zihintpause extension.
@@ -0,0 +1,10 @@
+//===-- RISCVInstrInfoZihintpause.td ---*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 5baec475b8b1213f667a2e4bd9bfe16ba68b4786 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH 1/2] [RISCV][MC] Add support for Q extension
---
.../Driv
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 1de7cc4392964c41db85a28a71295e69f6234f94 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH 1/2] [RISCV][MC] Add support for Q extension
---
.../Driv
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 5ee05130e5735c1d0257f8fee66d61bdfd057087 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH] [RISCV][MC] Add support for Q extension
---
.../Driver/p
@@ -131,20 +131,22 @@ def FPR32INX : RegisterOperand {
// The DAGOperand can be unset if the predicates are not enough to define it.
class ExtInfo predicates,
ValueType primaryvt, DAGOperand primaryty, DAGOperand f32ty,
- DAGOperand f64ty, DAGOperand
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From fb1cd01c31abbc3f97a8cb03e6a7f5887aeb16fa Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH] [RISCV][MC] Add support for Q extension
---
.../Driver/p
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 8285d7b93f2cadefd906e2ebbfbef4a6286c2ff3 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH] [RISCV][MC] Add support for Q extension
---
.../Driver/p
el-ev wrote:
* **#139369** https://app.graphite.dev/github/pr/llvm/llvm-project/139369?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/139369
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 8bcc1dbee118dd4c23cc5b1f349f3a3252959722 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Mon, 12 May 2025 13:19:06 +0800
Subject: [PATCH] [RISCV][MC] Add support for Q extension
---
.../Driver/p
@@ -131,20 +131,22 @@ def FPR32INX : RegisterOperand {
// The DAGOperand can be unset if the predicates are not enough to define it.
class ExtInfo predicates,
ValueType primaryvt, DAGOperand primaryty, DAGOperand f32ty,
- DAGOperand f64ty, DAGOperand
https://github.com/el-ev closed https://github.com/llvm/llvm-project/pull/136807
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https://github.com/el-ev approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/136807
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@@ -0,0 +1,168 @@
+//===-- RISCVInstrInfoF.td - RISC-V 'Q' instructions ---*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,168 @@
+//===-- RISCVInstrInfoF.td - RISC-V 'Q' instructions ---*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 27d19726f348c07de1e3437ef93511ff21fff8bb Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 10 May 2025 18:01:57 +0800
Subject: [PATCH] [RISCV][MC] Add support for Q extension
---
.../Driver/p
@@ -462,6 +474,12 @@ def FPR64C : RISCVRegisterClass<[f64], 64, (add
(sequence "F%u_D", 8, 9)
)>;
+def FPR128 : RISCVRegisterClass<
+ [f128], 128,
el-ev wrote:
Sorry, they were messed up by clang-format
https://github.com/llvm/llvm-project/
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 70a6d632c96de6564eea070d526bbbeaa8df3f08 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 10 May 2025 18:01:57 +0800
Subject: [PATCH] [RISCV][MC] Add support for Q extension
---
.../Driver/p
https://github.com/el-ev updated
https://github.com/llvm/llvm-project/pull/139369
>From 7ee8af28b85b5ca8200f6ce320f042843a4fa2e6 Mon Sep 17 00:00:00 2001
From: Iris Shi <0...@owo.li>
Date: Sat, 10 May 2025 18:01:57 +0800
Subject: [PATCH] [RISCV][MC] Add support for Q extension
---
.../Driver/p
https://github.com/el-ev created
https://github.com/llvm/llvm-project/pull/139369
Closes #130217.
https://github.com/riscv/riscv-isa-manual/blob/main/src/q-st-ext.adoc
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