https://github.com/Stylie777 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/110825
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@@ -706,6 +706,11 @@ def HasV9_5aOps : SubtargetFeature<"v9.5a",
"HasV9_5aOps", "true",
"Support ARM v9.5a instructions",
[HasV9_4aOps]>;
+// Armv9.6-A is a v9-only architecture.
+def HasV9_6aOps : Subt
https://github.com/Stylie777 approved this pull request.
Agree with @tmatheson-arm that there is more standardisation we can do here,
but probably out of scope for this PR.
https://github.com/llvm/llvm-project/pull/98550
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@@ -106,24 +106,24 @@ def FeatureSpecRestrict : Extension<"specrestrict",
"SpecRestrict", "FEAT_CSV2_2
//===--===//
def FeatureLSE : ExtensionWithMArch<"lse", "LSE", "FEAT_LSE",
- "Enable ARMv8.1 Large Syst
https://github.com/Stylie777 closed
https://github.com/llvm/llvm-project/pull/90614
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https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/90614
>From db0ca41c85b69f02f6e3b522ff3a2948e6a729fe Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 17 Apr 2024 14:17:51 +0100
Subject: [PATCH 1/4] [NFC] Add Extension Lookup to AArch64TargetParser
Currently,
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/90614
>From 59bc10d7418ed86f2fd94c8db5e34896164ef8e6 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 17 Apr 2024 14:17:51 +0100
Subject: [PATCH 1/4] [NFC] Add Extension Lookup to AArch64TargetParser
Currently,
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/90614
>From fa5d76b2d6d095abad76d892e59751727ac2e556 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 17 Apr 2024 14:17:51 +0100
Subject: [PATCH 1/4] [NFC] Add Extension Lookup to AArch64TargetParser
Currently,
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/90614
>From fa5d76b2d6d095abad76d892e59751727ac2e556 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 17 Apr 2024 14:17:51 +0100
Subject: [PATCH 1/3] [NFC] Add Extension Lookup to AArch64TargetParser
Currently,
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/90614
>From b21ee486bc7a877d3134bfcaf8633f171df2a043 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 17 Apr 2024 14:17:51 +0100
Subject: [PATCH 1/3] [NFC] Add Extension Lookup to AArch64TargetParser
Currently,
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/90614
>From b21ee486bc7a877d3134bfcaf8633f171df2a043 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Wed, 17 Apr 2024 14:17:51 +0100
Subject: [PATCH 1/2] [NFC] Add Extension Lookup to AArch64TargetParser
Currently,
https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/90614
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https://github.com/Stylie777 created
https://github.com/llvm/llvm-project/pull/90614
Currently, LLVM enables `-mbranch-protection=standard` as `bti+pac-ret`. To
align LLVM with the behaviour in GNU, this has been updated to `bti+pac-ret+pc`
when FEAT_PAuth_LR is enabled as an optional feature
https://github.com/Stylie777 approved this pull request.
https://github.com/llvm/llvm-project/pull/90440
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https://github.com/Stylie777 approved this pull request.
LGTM!
https://github.com/llvm/llvm-project/pull/90143
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https://github.com/Stylie777 closed
https://github.com/llvm/llvm-project/pull/85203
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https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/85203
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@@ -2487,10 +2480,10 @@ AArch64ExtensionDependenciesBaseCPUTestParams
{}},
{"cortex-a520",
{},
- {"v9.2a","bf16", "crc", "dotprod", "f32mm",
"flagm",
- "fp-armv8", "fullfp16", "fp16fml", "i8mm","lse", "
Stylie777 wrote:
@jthackray I have updated the commit message as part of the most recent patch
set.
https://github.com/llvm/llvm-project/pull/85203
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@@ -74,6 +74,7 @@ Changes to the AMDGPU Backend
Changes to the ARM Backend
--
+* FEAT_F32MM is no longer activated by default when using `+sve` on v8.6-A or
greater. The feature is still availble and can be using by adding `+f32mm` to
the command line
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/85203
>From 7a2fbb00155da9e165c82614c9436e149c2b18e4 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Thu, 14 Mar 2024 13:55:46 +
Subject: [PATCH] [AArch64] Remove Automatic Enablement of FEAT_F32MM
When `+sve`
https://github.com/Stylie777 updated
https://github.com/llvm/llvm-project/pull/85203
>From 276e3421de7ebe2e2a9a2feb02d585bf3d4e8915 Mon Sep 17 00:00:00 2001
From: Jack Styles
Date: Thu, 14 Mar 2024 10:43:22 +
Subject: [PATCH] [AArch64] Remove Automatic Enablement of FEAT_F32MM
When `+sve`
https://github.com/Stylie777 created
https://github.com/llvm/llvm-project/pull/85203
When `+sve` is passed in the command line, if the Architecture being targeted
is V8.6A/V9.1A or later, `+f32mm` is also added. This enables FEAT_32MM,
however at the time of writing no CPU's support this. This
Stylie777 wrote:
I think this can be one commit, the formatting changes can be squashed into the
commit that makes the changes. Also make sure the commit message fits in with
LLVM guidelines. See: https://llvm.org/docs/DeveloperPolicy.html#id18
https://github.com/llvm/llvm-project/pull/81466
_
https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/80819
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https://github.com/Stylie777 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/80819
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@@ -1354,9 +1354,9 @@ let isScalarNarrowShift = 1 in {
// Signed/Unsigned Saturating Rounded Shift Right Narrow (Immediate)
def SCALAR_SQRSHRN_N: SInst<"vqrshrn_n", "(1<)1I", "SsSiSlSUsSUiSUl">;
// Signed Saturating Shift Right Unsigned Narrow (Immediate)
- def SCALAR_SQ
@@ -1354,9 +1354,9 @@ let isScalarNarrowShift = 1 in {
// Signed/Unsigned Saturating Rounded Shift Right Narrow (Immediate)
def SCALAR_SQRSHRN_N: SInst<"vqrshrn_n", "(1<)1I", "SsSiSlSUsSUiSUl">;
// Signed Saturating Shift Right Unsigned Narrow (Immediate)
- def SCALAR_SQ
https://github.com/Stylie777 commented:
One comment from me
https://github.com/llvm/llvm-project/pull/80819
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https://github.com/Stylie777 edited
https://github.com/llvm/llvm-project/pull/80819
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