https://github.com/jhuber6 created
https://github.com/llvm/llvm-project/pull/156063
Summary:
Right now these enformce alignment, which isn't convenient for the user
on platforms that support unaligned accesses. The options are to either
permit passing the alignment manually, or just assume it's
@@ -11016,7 +11016,7 @@ def err_sizeless_nonlocal : Error<
def err_vec_masked_load_store_ptr : Error<
"%ordinal0 argument must be a %1">;
def err_vec_masked_load_store_size : Error<
- "all arguments to %0 must have the same number of elements (was %1 and %2)">;
+ "all argument
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/156042
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@@ -950,6 +950,11 @@ argument is always boolean mask vector. The
``__builtin_masked_load`` builtin
takes an optional third vector argument that will be used for the result of the
masked-off lanes. These builtins assume the memory is always aligned.
+The ``__builtin_masked_exp
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/156042
>From 1221affdc11f757ced2303a894950badde4b9833 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Fri, 29 Aug 2025 09:57:19 -0500
Subject: [PATCH 1/3] [Clang] Add masked vector builtins for expand and
compress a
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/156042
>From 1221affdc11f757ced2303a894950badde4b9833 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Fri, 29 Aug 2025 09:57:19 -0500
Subject: [PATCH 1/2] [Clang] Add masked vector builtins for expand and
compress a
@@ -11016,7 +11016,7 @@ def err_sizeless_nonlocal : Error<
def err_vec_masked_load_store_ptr : Error<
"%ordinal0 argument must be a %1">;
def err_vec_masked_load_store_size : Error<
- "all arguments to %0 must have the same number of elements (was %1 and %2)">;
+ "all argument
@@ -950,6 +950,11 @@ argument is always boolean mask vector. The
``__builtin_masked_load`` builtin
takes an optional third vector argument that will be used for the result of the
masked-off lanes. These builtins assume the memory is always aligned.
+The ``__builtin_masked_exp
https://github.com/jhuber6 edited
https://github.com/llvm/llvm-project/pull/156042
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https://github.com/jhuber6 created
https://github.com/llvm/llvm-project/pull/156042
Summary:
The interface here is nearly indentical to the already added masked
loads and stores. These bind to very similar intrinsics so we add them
here.
>From 1221affdc11f757ced2303a894950badde4b9833 Mon Sep 1
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/155652
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@@ -946,7 +946,9 @@ Let ``VT`` be a vector type and ``ET`` the element type of
``VT``.
Each builtin accesses memory according to a provided boolean mask. These are
provided as ``__builtin_masked_load`` and ``__builtin_masked_store``. The first
-argument is always boolean mask
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/155652
>From 3a62febbcf70485bc287f3ea713a8eff61cf215d Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 27 Aug 2025 11:35:56 -0500
Subject: [PATCH 1/3] [Clang] Update `__builtin_masked_load` to accept
passthrough
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/155652
>From 3a62febbcf70485bc287f3ea713a8eff61cf215d Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 27 Aug 2025 11:35:56 -0500
Subject: [PATCH 1/2] [Clang] Update `__builtin_masked_load` to accept
passthrough
jhuber6 wrote:
ping
https://github.com/llvm/llvm-project/pull/154203
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https://github.com/llvm/llvm-project/pull/154203
>From cc9d2d9e4923bad0d904d251fa116ad388b0b6ac Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 18 Aug 2025 15:59:46 -0500
Subject: [PATCH 1/6] [Clang] Support generic bit counting builtins on fixed
boole
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154817
>From d2eceb10f6bb33c28f4891b0664e4978b7a76c88 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Thu, 21 Aug 2025 13:14:03 -0500
Subject: [PATCH] [Clang] Fix incorrect return type for
`__builtin_shufflevector`
https://github.com/jhuber6 created
https://github.com/llvm/llvm-project/pull/154817
Summary:
The `__builtin_shufflevector` call would return a GCC vector in all
cases where the vector type was increased. Change this to preserve
whether or not this was an extended vector.
Fixes: https://github.c
https://github.com/jhuber6 edited
https://github.com/llvm/llvm-project/pull/154203
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https://github.com/jhuber6 commented:
Do you know if gcc auto links these and this behavior matches?
https://github.com/llvm/llvm-project/pull/154826
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https://github.com/llvm/llvm-project/pull/154817
>From d2eceb10f6bb33c28f4891b0664e4978b7a76c88 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Thu, 21 Aug 2025 13:14:03 -0500
Subject: [PATCH] [Clang] Fix incorrect return type for
`__builtin_shufflevector`
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154817
>From d2eceb10f6bb33c28f4891b0664e4978b7a76c88 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Thu, 21 Aug 2025 13:14:03 -0500
Subject: [PATCH] [Clang] Fix incorrect return type for
`__builtin_shufflevector`
https://github.com/jhuber6 edited
https://github.com/llvm/llvm-project/pull/154203
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@@ -4213,7 +4213,7 @@ such as ``unsigned __int128`` and C23 ``unsigned
_BitInt(N)``.
``__builtin_clzg`` (respectively ``__builtin_ctzg``) returns the number of
leading (respectively trailing) 0 bits in the first argument. The first
argument
-can be of any unsigned integer ty
@@ -4213,7 +4213,7 @@ such as ``unsigned __int128`` and C23 ``unsigned
_BitInt(N)``.
``__builtin_clzg`` (respectively ``__builtin_ctzg``) returns the number of
leading (respectively trailing) 0 bits in the first argument. The first
argument
-can be of any unsigned integer ty
@@ -1693,6 +1693,22 @@ getBitTestAtomicOrdering(BitTest::InterlockingKind I) {
llvm_unreachable("invalid interlocking");
}
+static llvm::Value *EmitIntegerExpr(CodeGenFunction &CGF, const Expr *E) {
+ llvm::Value *ArgValue = CGF.EmitScalarExpr(E);
+ llvm::Type *ArgType = A
@@ -13455,6 +13455,10 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const
CallExpr *E,
case Builtin::BI__lzcnt16: // Microsoft variants of count leading-zeroes
case Builtin::BI__lzcnt:
case Builtin::BI__lzcnt64: {
+// TODO: Handle boolean vectors in constexpr conte
@@ -4213,7 +4213,7 @@ such as ``unsigned __int128`` and C23 ``unsigned
_BitInt(N)``.
``__builtin_clzg`` (respectively ``__builtin_ctzg``) returns the number of
leading (respectively trailing) 0 bits in the first argument. The first
argument
-can be of any unsigned integer ty
jhuber6 wrote:
> Is the idea behind only supporting boolean vectors that the operation on
> arbitrary integer vectors probably ought to be a vector-to-vector operation?
> That seems reasonable, but are we going to regret having inconsistent
> behavior between different vector types, then?
Tha
https://github.com/jhuber6 commented:
This seems like a pretty massive work-around. Could you be more specific about
what the issue is? I'd expect LLVM optimizations to preserve everything we
need, and if they don't it's because we're breaking the rules / overriding
symbols with `-mlink-builti
jhuber6 wrote:
> > I think `-ffat-lto-objects` uses exclude metadata, but I'm not overly
> > familiar with what that's intended to do.
>
> Effect of exclude kind:
> https://discourse.llvm.org/t/end-to-end-fembed-bitcode-llvmbc-and-llvmcmd/56265/14?u=haohaiwen
I know what the exclude option th
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154203
>From 6aee3cfe0db0602479e8d5fedcb3eb6b699e2db3 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 18 Aug 2025 15:59:46 -0500
Subject: [PATCH] [Clang] Support generic bit counting builtins on fixed
boolean v
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/154464
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https://github.com/llvm/llvm-project/pull/154203
>From c2f86a3591a4e44e875cd00967ed8679876de287 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 18 Aug 2025 15:59:46 -0500
Subject: [PATCH] [Clang] Support generic bit counting builtins on fixed
boolean v
jhuber6 wrote:
> > Dropping in after the fact, is there a reason we called this
> > `__builtin_elementwise_ctlz` instead of `__builtin_elementwise_clzg`? The
> > builtin is just `clzg` done on each element so the name is confusing me.
>
> It matches the llvm intrinsic name, and the second argu
jhuber6 wrote:
Dropping in after the fact, is there a reason we called this
`__builtin_elementwise_ctlz` instead of `__builtin_elementwise_clzg`? The
builtin is just `clzg` done on each element so the name is confusing me.
https://github.com/llvm/llvm-project/pull/131995
__
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154464
>From 4d8e7e1b3602f3c6e40be994fe495d30523c9a5c Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH] [Clang] Add builtins for masked vector loads / stores
Summary:
C
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154464
>From 6861a2b2b142e9550ec9d0642f93471652a73901 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH] [Clang] Add builtins for masked vector loads / stores
Summary:
C
@@ -941,6 +941,24 @@ Let ``VT`` be a vector type and ``ET`` the element type of
``VT``.
for the comparison.
===
==
@@ -1232,6 +1232,18 @@ def ConvertVector : Builtin {
let Prototype = "void(...)";
}
+def MaskedLoad : Builtin {
+ let Spellings = ["__builtin_masked_load"];
jhuber6 wrote:
On second thought, I decided to leave it because it both matches the LLVM
intrinsic
@@ -2266,6 +2266,87 @@ static bool BuiltinCountZeroBitsGeneric(Sema &S,
CallExpr *TheCall) {
return false;
}
+static ExprResult BuiltinMaskedLoad(Sema &S, CallExpr *TheCall) {
+ if (S.checkArgCount(TheCall, 2))
+return ExprError();
+
+ Expr *MaskArg = TheCall->getArg(
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154464
>From 8e19054cf3888342fa853f9fae30032a60cd22d9 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH] [Clang] Add builtins for masked vector loads / stores
Summary:
C
jhuber6 wrote:
As far as I understand, numbered address spaces are intended to be a direct
line into the LLVM-IR / backend's interpretation of them. Language AS's are
intended to be a thin veneer over the semantics of that. For example `AS(3)` is
LDS in AMDGPU if you compile to the AMDGPU back
@@ -1232,6 +1232,18 @@ def ConvertVector : Builtin {
let Prototype = "void(...)";
}
+def MaskedLoad : Builtin {
+ let Spellings = ["__builtin_masked_load"];
jhuber6 wrote:
I'll change it to `__builtin_masked_vector_[load|store]` and add documentation.
htt
@@ -2266,6 +2266,87 @@ static bool BuiltinCountZeroBitsGeneric(Sema &S,
CallExpr *TheCall) {
return false;
}
+static ExprResult BuiltinMaskedLoad(Sema &S, CallExpr *TheCall) {
+ if (S.checkArgCount(TheCall, 2))
+return ExprError();
+
+ Expr *MaskArg = TheCall->getArg(
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/154145
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>From f95f62320b3fb7525a34e49571e2519ec0b78ccd Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH 1/3] [Clang] Add builtins for masked vector loads / stores
Summar
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154464
>From f95f62320b3fb7525a34e49571e2519ec0b78ccd Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH 1/3] [Clang] Add builtins for masked vector loads / stores
Summar
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154464
>From f95f62320b3fb7525a34e49571e2519ec0b78ccd Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH 1/3] [Clang] Add builtins for masked vector loads / stores
Summar
@@ -1232,6 +1232,18 @@ def ConvertVector : Builtin {
let Prototype = "void(...)";
}
+def MaskedLoad : Builtin {
+ let Spellings = ["__builtin_masked_load"];
+ let Attributes = [NoThrow, Const, CustomTypeChecking, Constexpr];
jhuber6 wrote:
Whoops, forgot
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154464
>From f95f62320b3fb7525a34e49571e2519ec0b78ccd Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH 1/2] [Clang] Add builtins for masked vector loads / stores
Summar
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154464
>From f95f62320b3fb7525a34e49571e2519ec0b78ccd Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Tue, 19 Aug 2025 23:01:03 -0500
Subject: [PATCH] [Clang] Add builtins for masked vector loads / stores
Summary:
C
https://github.com/jhuber6 created
https://github.com/llvm/llvm-project/pull/154464
Summary:
Clang has support for boolean vectors, these builtins expose the LLVM
instruction of the same name. This differs from a manual load and select
by potentially suppressing traps from deactivated lanes.
Fi
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/153504
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https://github.com/llvm/llvm-project/pull/153504
>From eff0af357efd323f26f9188745681132d122253a Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 13 Aug 2025 17:31:18 -0500
Subject: [PATCH 1/2] [LLVM] Introduce 'llvm-offload-wrapper' tool
Summary:
This i
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/153504
>From eff0af357efd323f26f9188745681132d122253a Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 13 Aug 2025 17:31:18 -0500
Subject: [PATCH] [LLVM] Introduce 'llvm-offload-wrapper' tool
Summary:
This is a
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/153504
>From 5d9b3c0ea9c1aa7683995b3e8f69191c497bf247 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 13 Aug 2025 17:31:18 -0500
Subject: [PATCH 1/2] [LLVM] Introduce 'llvm-offload-wrapper' tool
Summary:
This i
jhuber6 wrote:
I'm looking into how to make this `constexpr`, could we just do bit packing if
we encounter a vector of booleans to treat it as an integer here?
https://github.com/llvm/llvm-project/pull/154203
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https://github.com/llvm/llvm-project/pull/154227
>From fb6fc11a3f4687e45207f43e867b6cb46bf7b1cf Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 18 Aug 2025 18:36:57 -0500
Subject: [PATCH] [Clang] Add queryable feature 'boolean_vectors' for SIMD
masks
jhuber6 wrote:
> I clicked accept, but not sure I'm super in favor of the name? Maybe see if
> folks will bikeshed it for you? I'm a bit concerned it is too close to other
> things (vector is ambiguous of course).
>
> Maybe:
>
> `boolean_gnu_vector_type` and `boolean_ext_vector_type`
>
> WDY
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154227
>From 9e4dc9de57df323534b90b5c790401468b8c094d Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 18 Aug 2025 18:36:57 -0500
Subject: [PATCH 1/2] [Clang] Add queryable feature 'boolean_vectors' for SIMD
mas
jhuber6 wrote:
That PR totally disables the OpenCL generic AS, it seems weird that C/C++ can
use it fine but SYCL can't.
https://github.com/llvm/llvm-project/pull/152314
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https://github.com/jhuber6 commented:
This function was a little weird because the intrinsic specifies the address
space I think. Do you know explicitly why we can't cast here? Seems weird that
the compiler would fall over on this.
https://github.com/llvm/llvm-project/pull/152314
_
jhuber6 wrote:
ping
https://github.com/llvm/llvm-project/pull/153504
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@@ -5558,8 +5558,8 @@ VisitAbstractConditionalOperator(const
AbstractConditionalOperator *E) {
// OpenCL: If the condition is a vector, we can treat this condition like
// the select function.
- if ((CGF.getLangOpts().OpenCL && condExpr->getType()->isVectorType()) ||
-
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/154145
>From 0e67cc11433a0e2e0d5ac454643de07eba7a145a Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 18 Aug 2025 09:35:01 -0500
Subject: [PATCH] [Clang] Support using boolean vectors in ternary operators
Summa
jhuber6 wrote:
> > errors, but I think to fold it directly we'd need a dedicated builtin. But
> > I'm not a master of the clang AST.
>
> We shouldn't need a builtin, we should just be able to handle the AST nodes
> directly in ExprConstant.cpp.
Ah, right. That doesn't work, but it seems like
jhuber6 wrote:
The constexpr case doesn't cause errors, but I think to fold it directly we'd
need a dedicated builtin. But I'm not a master of the clang AST.
https://github.com/llvm/llvm-project/pull/154145
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https://github.com/llvm/llvm-project/pull/154145
>From 0e67cc11433a0e2e0d5ac454643de07eba7a145a Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Mon, 18 Aug 2025 09:35:01 -0500
Subject: [PATCH 1/2] [Clang] Support using boolean vectors in ternary
operators
jhuber6 wrote:
> > > Nope, that was me mis-reading the Github interface. LGTM.
> >
> >
> > Nice, thanks for the quick review. I'm going to try making the generic bit
> > functions (e.g. `__builtin_ctzg`) work with these vestors as well. A future
> > patch I'll like to add a new queryable feat
jhuber6 wrote:
> > > This needs a release note, else I think this is fine. LGTM.
> >
> >
> > I added one under the non-comprehensive changes. Should I put it somewhere
> > more specific?
>
> Nope, that was me mis-reading the Github interface. LGTM.
Nice, thanks for the quick review. I'm goin
jhuber6 wrote:
> This needs a release note, else I think this is fine. LGTM.
I added one under the non-comprehensive changes. Should I put it somewhere more
specific?
https://github.com/llvm/llvm-project/pull/154145
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https://github.com/jhuber6 created
https://github.com/llvm/llvm-project/pull/154145
Summary:
It's extremely common to conditionally blend two vectors. Previously
this was done with mask registers, which is what the normal ternary code
generation does when used on a vector. However, since Clang 1
jhuber6 wrote:
> > I'd suggest you just try doing `--offload-new-driver` with `-###` and `-v`
> > and see what doesn't work.
>
> Running the `hipspv-toolchain.hip` case with the `--offload-new-driver`
> option reveals that it is missing steps for running custom pass plugin on the
> final devi
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/153504
>From 5d9b3c0ea9c1aa7683995b3e8f69191c497bf247 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 13 Aug 2025 17:31:18 -0500
Subject: [PATCH] [LLVM] Introduce 'llvm-offload-wrapper' tool
Summary:
This is a
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/153504
>From 11b6ee49f073517b917b7be693ba673d2afe5a59 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 13 Aug 2025 17:31:18 -0500
Subject: [PATCH] [LLVM] Introduce 'llvm-offload-wrapper' tool
Summary:
This is a
https://github.com/jhuber6 approved this pull request.
https://github.com/llvm/llvm-project/pull/153573
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jhuber6 wrote:
> > Sorry for the delayed response - I have been on a long vacation.
> > I’m not familiar with the new offload driver internals to give pointers on
> > what needs to be changed and where for retaining the custom plugin and
> > linker behavior needed by the
> > [chipStar](https:/
jhuber6 wrote:
> Sorry for the delayed response - I have been on a long vacation.
>
> I’m not familiar with the new offload driver internals to give pointers on
> what needs to be changed and where for retaining the custom plugin and linker
> behavior needed by the [chipStar](https://github.co
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/123359
>From 85c697ed272debf032d194ea6ef4b85411350958 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Fri, 17 Jan 2025 09:35:34 -0600
Subject: [PATCH] [HIP] Move HIP to the new driver by default
Summary:
This patch
jhuber6 wrote:
> Thanks! This functionality is much needed. Would it be better if we add it as
> a flag in the existing `clang-linker-wrapper` tool, instead of adding a new
> tool?
Honestly a lot of those clang tools should be made LLVM tools anyways. There's
plenty of existing LLVM tools th
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/153504
>From 11b6ee49f073517b917b7be693ba673d2afe5a59 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Wed, 13 Aug 2025 17:31:18 -0500
Subject: [PATCH] [LLVM] Introduce 'llvm-offload-wrapper' tool
Summary:
This is a
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/152789
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https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/152789
>From e3b1708170f67d2c9b87e2d750d2bc8dc3ac061f Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Fri, 8 Aug 2025 15:26:31 -0500
Subject: [PATCH] [Clang] Always pass detected CUDA path to
'clang-nvlink-wrapper'
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/152789
>From b36335f136ea0ce1a29f9962d8a9b5575162a450 Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Fri, 8 Aug 2025 15:26:31 -0500
Subject: [PATCH] [Clang] Always pass detected CUDA path to
'clang-nvlink-wrapper'
jhuber6 wrote:
I think `-ffat-lto-objects` uses exclude metadata, but I'm not overly familiar
with what that's intended to do.
https://github.com/llvm/llvm-project/pull/151910
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@@ -691,9 +696,12 @@ Error runNVLink(ArrayRef Files, const ArgList
&Args) {
if (Args.hasArg(OPT_lto_emit_asm) || Args.hasArg(OPT_lto_emit_llvm))
return Error::success();
- std::string CudaPath = Args.getLastArgValue(OPT_cuda_path_EQ).str();
- Expected NVLinkPath =
-
https://github.com/jhuber6 updated
https://github.com/llvm/llvm-project/pull/152789
>From fff2a4bd4fa424fedaed4fff04a9b46f03f8ff9e Mon Sep 17 00:00:00 2001
From: Joseph Huber
Date: Fri, 8 Aug 2025 15:26:31 -0500
Subject: [PATCH] [Clang] Always pass detected CUDA path to
'clang-nvlink-wrapper'
https://github.com/jhuber6 created
https://github.com/llvm/llvm-project/pull/152789
Summary:
We always want to use the detected path. The clang driver's detection is
far more sophisticated so we should use that whenever possible. Also
update the usage so we properly fall back to path instead of
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/151507
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https://github.com/jhuber6 approved this pull request.
Random question, what would compression look like for the offload binaries? I'm
wondering how difficult it would be to switch HIP to using those instead of the
bundles for its binary format.
https://github.com/llvm/llvm-project/pull/152600
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/151969
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https://github.com/jhuber6 edited
https://github.com/llvm/llvm-project/pull/134016
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https://github.com/jhuber6 approved this pull request.
This looks good for me as a first step, but we'll definitely need some of the
others to chime in before merging. In general I'd like to see us move towards
something that more generic, considering that it seems like SPIRV, NVPTX, and
AMDGP
https://github.com/jhuber6 edited
https://github.com/llvm/llvm-project/pull/147508
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@@ -620,6 +635,422 @@ void createRegisterFatbinFunction(Module &M,
GlobalVariable *FatbinDesc,
// Add this function to constructors.
appendToGlobalCtors(M, CtorFunc, /*Priority=*/101);
}
+
+/// SYCLWrapper helper class that creates all LLVM IRs wrapping given images.
+stru
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/151964
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