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arsenm wrote:
> Moving them into clc should resolve the concern, but I don't know where is
> destination directory in clc. I don't know how to map `opencl/lib/amdgcn` and
> `opencl/lib/r600` to `clc/lib/amdgcn` and `clc/lib/amdgpu`. Do you have
> suggestions about the mapping?
r600 and amdgcn
@@ -417,3 +417,15 @@ void HIPAMDToolChain::checkTargetID(
getDriver().Diag(clang::diag::err_drv_bad_target_id)
<< *PTID.OptionalTargetID;
}
+
+SPIRVAMDToolChain::SPIRVAMDToolChain(const Driver &D,
+ const llvm::Triple &Triple,
+
arsenm wrote:
> `llvm.compiler.used` global uses AS(0) which makes SPIR-V unhappy, but with
> this global it's AS(4) which makes it happy. Either way, this should be fixed.
llvm.used and llvm.compiler.used should universally use addrspace(0) and SPIRV
should be fixed to not break on this
arsenm wrote:
> and that's why you want to have single element loads that get inserted into a
> vector and then perform sub-vector extracts on it?
We care about eliminate stack usage at any cost. Big load are always better,
even if not naturally aligned. When we do care about alignment, we onl
arsenm wrote:
> We do support unaligned access IIUC, and it is actually required by HSA ABI.
> CC @arsenm
Unaligned access has been supported since almost always. There's just a mode
control for it, you can disable it in the driver though
https://github.com/llvm/llvm-project/pull/133301
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Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,98 @@
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic
-Wconversion -Werror -fsyntax-only -
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,98 @@
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic
-Wconversion -Werror -fsyntax-only -
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?= ,
Juan Manuel Martinez =?utf-8?q?Caamaño?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,98 @@
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic
-Wconversion -Werror -fsyntax-only -
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https://github.com/arsenm closed
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arsenm wrote:
* **#142534** https://app.graphite.dev/github/pr/llvm/llvm-project/142534?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/14253
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/142534
None
>From ef0db5d83400a2d43a8706cbfb7374a91d68f72f Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Mon, 2 Jun 2025 16:58:10 +0200
Subject: [PATCH] clang: Fix wrong C++ marker in tablegen file
---
clang/in
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@@ -121,14 +121,21 @@ bool IsValidCloning(const MachineFunction &MF,
}
if (PathBB->isMachineBlockAddressTaken()) {
// Avoid cloning blocks which have their address taken since we can't
-// rewire branches to those blocks as easily (e.g., branches wit
@@ -121,14 +121,21 @@ bool IsValidCloning(const MachineFunction &MF,
}
if (PathBB->isMachineBlockAddressTaken()) {
// Avoid cloning blocks which have their address taken since we can't
-// rewire branches to those blocks as easily (e.g., branches wit
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@@ -78,6 +78,12 @@ __global__ void template_32_4_a_max_num_work_groups() {}
template __global__ void template_32_4_a_max_num_work_groups<2>();
// CHECK: define{{.*}} amdgpu_kernel void
@_Z35template_32_4_a_max_num_work_groupsILj2EEvv()
[[MAX_NUM_WORK_GROUPS_32_4_2:#[0-9]+]]
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@@ -537,7 +537,7 @@ class StdLibraryFunctionsChecker
/// a later bug report created by ErrnoChecker.
/// Empty return value means that 'errno' related bug may not happen from
/// the current analyzed function.
-virtual const std::string describe(CheckerContext &
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arsenm wrote:
> The OpenCL-CTS doesn't actually test the geometrics builtins with that option
> - that's just for bruteforce.
Sounds like a bug
> It passes on an OpenCL implementation which advertises support for
> single-precision denormals, yes.
Ideally would check it works with denormal f
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Doesn't seem right that this is looking to the IR for the size instead of
directly at the source type
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@@ -1,8 +1,6 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
-// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu
gfx942 \
-// RUN: %s -emit-llvm -o - | FileCheck %s
-
-// REQUIRES: amdgpu-registere
@@ -0,0 +1,45 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu
gfx942 \
+// RUN: %s -emit-llvm -o - | FileCheck %s
+
+// REQUIRES: amdgpu-register
@@ -0,0 +1,45 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu
gfx942 \
+// RUN: %s -emit-llvm -o - | FileCheck %s
+
+// REQUIRES: amdgpu-register
@@ -274,9 +274,10 @@ Value *EmitFromInt(CodeGenFunction &CGF, llvm::Value *V,
Address CheckAtomicAlignment(CodeGenFunction &CGF, const CallExpr *E) {
ASTContext &Ctx = CGF.getContext();
Address Ptr = CGF.EmitPointerWithAlignment(E->getArg(0));
+ const llvm::DataLayout &DL
@@ -0,0 +1,45 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu
gfx942 \
arsenm wrote:
-disable-llvm-passes, and can you use -cl-st
@@ -0,0 +1,45 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -O0 -cl-std=CL2.0 -triple amdgcn-amd-amdhsa -target-cpu
gfx942 \
+// RUN: %s -emit-llvm -o - | FileCheck %s
+
+// REQUIRES: amdgpu-register
@@ -1,15 +1,26 @@
-; REQUIRES: x86, non-root-user
-;; Not supported on windows since we use permissions to deny the creation
-; UNSUPPORTED: system-windows
+;; The output is OS-specific, so this test is limited to Windows.
arsenm wrote:
This new failure condition
@@ -744,7 +744,7 @@ template class [[nodiscard]] Expected {
/// @deprecated Use reportFatalInternalError() or reportFatalUsageError()
/// instead.
[[noreturn]] LLVM_ABI void report_fatal_error(Error Err,
- bool gen_crash_diag = true
@@ -1,15 +1,26 @@
-; REQUIRES: x86, non-root-user
-;; Not supported on windows since we use permissions to deny the creation
-; UNSUPPORTED: system-windows
+;; The output is OS-specific, so this test is limited to Windows.
arsenm wrote:
Switching a test from "not
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arsenm wrote:
> I don't think you can reasonably test this with a lit test, you have to add
> this as a proper build target in llvm/examples similar to Bye.
A lit test could then drive the load of that plugin, but the lit test can't
contain the pass itself
https://github.com/llvm/llvm-projec
arsenm wrote:
I don't think you can reasonably test this with a lit test, you have to add
this as a proper build target in llvm/examples similar to Bye
https://github.com/llvm/llvm-project/pull/139059
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@@ -8811,6 +8820,68 @@ void AMDGPUAsmParser::cvtVINTERP(MCInst &Inst, const
OperandVector &Operands)
Inst.getOperand(ModIdx).setImm(ModVal);
}
}
+void AMDGPUAsmParser::cvtScaledMFMA(MCInst &Inst,
+const OperandVector &Operands) {
+ Op
@@ -8811,6 +8820,68 @@ void AMDGPUAsmParser::cvtVINTERP(MCInst &Inst, const
OperandVector &Operands)
Inst.getOperand(ModIdx).setImm(ModVal);
}
}
+void AMDGPUAsmParser::cvtScaledMFMA(MCInst &Inst,
+const OperandVector &Operands) {
+ Op
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@@ -8811,6 +8820,68 @@ void AMDGPUAsmParser::cvtVINTERP(MCInst &Inst, const
OperandVector &Operands)
Inst.getOperand(ModIdx).setImm(ModVal);
}
}
+void AMDGPUAsmParser::cvtScaledMFMA(MCInst &Inst,
+const OperandVector &Operands) {
+ Op
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@@ -420,12 +420,37 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} )
-D${CLC_TARGET_DEFINE}
# All libclc builtin libraries see CLC headers
-I${CMAKE_CURRENT_SOURCE_DIR}/clc/include
+ # Error on undefined macros
+ -Werror=undef
)
if( NOT "${cpu}"
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arsenm wrote:
> I wasn't sure if this was necessary so this commit replaces the vector2
> versions of the constants with the vector3/vector4 ones. The OpenCL-CTS seems
> okay with it. If this is incorrect then it's not very difficult to split them
> back out again.
Does it pass with -cl-denor
arsenm wrote:
> If you want to add new intrinsics that don't have the offset and that
> pattern-match instead, I'd be more than happy to review that - or if we want
> to break back-compat by getting rid of the offset.
I don't think we need to worry about compatibility with an intrinsic that's
@@ -0,0 +1,63 @@
+# RUN: llc -verify-machineinstrs -O0 -mtriple spirv-unknown-unknown
-run-pass=spirv-prelegalizer-combiner %s -o - | FileCheck %s
+# REQUIRES: asserts
+---
+name:faceforward_instcombine_float
+tracksRegLiveness: true
+legalized: true
+body:
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arsenm wrote:
I think we'd be better off omitting the offset from the intrinsic signature
https://github.com/llvm/llvm-project/pull/137425
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arsenm wrote:
> > I am not ok with this being an error by default.
>
> I think compilation must fail when an unsupported and untested option is
> specified. And that includes when the target is SPIR-V.
I would call it a supported and used option. The unsupported and untested
pieces are in the
arsenm wrote:
It's really a library problem, not a codegen issue. The library should still be
emitting the warning. You should be able to write wave64 code unperturbed due
to hip standard library bugs
https://github.com/llvm/llvm-project/pull/140185
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I am not ok with this being an error by default.
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@@ -98,21 +110,98 @@ void applySPIRVDistance(MachineInstr &MI,
MachineRegisterInfo &MRI,
SPIRVGlobalRegistry *GR =
MI.getMF()->getSubtarget().getSPIRVGlobalRegistry();
- auto RemoveAllUses = [&](Register Reg) {
-SmallVector UsesToErase(
-llvm::make_pointe
arsenm wrote:
I thought we already added a generic -stdinc/nostdinc for this
https://github.com/llvm/llvm-project/pull/140106
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@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown %s -emit-llvm -o - |
FileCheck %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64:enable
+
+typedef int v8i __attribut
@@ -635,5 +635,10 @@ TARGET_BUILTIN(__builtin_amdgcn_bitop3_b16, "IUi",
"nc", "bitop3-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf16_f32, "V2yV2yfUiIb", "nc",
"f32-to-f16bf16-cvt-sr-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_f16_f32, "V2hV2hfUiIb", "nc",
"f32-to-
@@ -683,6 +683,30 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateInsertElement(I0, A, 1);
}
+ case AMDGPU::BI__builtin_amdgcn_image_load_2d_f32_i32: {
+llvm::Type *RetTy = llvm::Type::getFloatTy(Builder.getContext());
+
@@ -683,6 +683,30 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateInsertElement(I0, A, 1);
}
+ case AMDGPU::BI__builtin_amdgcn_image_load_2d_f32_i32: {
+llvm::Type *RetTy = llvm::Type::getFloatTy(Builder.getContext());
+
@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown %s -emit-llvm -o - |
FileCheck %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64:enable
+
+typedef int v8i __attribut
@@ -683,6 +683,30 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateInsertElement(I0, A, 1);
}
+ case AMDGPU::BI__builtin_amdgcn_image_load_2d_f32_i32: {
+llvm::Type *RetTy = llvm::Type::getFloatTy(Builder.getContext());
+
@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown %s -emit-llvm -o - |
FileCheck %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64:enable
+
+typedef int v8i __attribut
@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown %s -emit-llvm -o - |
FileCheck %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64:enable
arsenm wrote
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/139891
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https://github.com/arsenm edited
https://github.com/llvm/llvm-project/pull/139959
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@@ -127,11 +127,7 @@ template constexpr vector lit_impl(T
NDotL, T NDotH, T M) {
}
template constexpr T faceforward_impl(T N, T I, T Ng) {
-#if (__has_builtin(__builtin_spirv_faceforward))
- return __builtin_spirv_faceforward(N, I, Ng);
-#else
return select(dot(I, Ng) <
https://github.com/arsenm commented:
Description mentions instcombine but this has nothing to do with instcombine
https://github.com/llvm/llvm-project/pull/139959
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https://github.com/arsenm commented:
Needs header test
https://github.com/llvm/llvm-project/pull/139697
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/139713
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arsenm wrote:
> It's just the AMDGCN target without any `+features`, right? The only issue I
> was aware of was assuming w64 when unspecified but you fixed that previously.
Almost, but it's problematic in several ways. The problems multiply once you
start adding in manually specified target_fe
@@ -43,7 +43,9 @@ _CLC_OVERLOAD _CLC_DEF __CLC_SCALAR_GENTYPE
__clc_length(__CLC_GENTYPE p) {
if (l2 < __CLC_GENTYPE_MIN) {
p *= __CLC_GENTYPE_MIN_SCALE_UP;
return __clc_sqrt(__clc_dot(p, p)) * __CLC_GENTYPE_MIN_SCALE_DOWN;
- } else if (l2 == INFINITY) {
+ }
+
+ i
https://github.com/arsenm approved this pull request.
I still think this should be fixed to be in terms of frexp utilities but this
is just moving it anyway and that's separate
https://github.com/llvm/llvm-project/pull/128028
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