[PATCH] D110618: [HIPSPV][2/4] Add HIPSPV tool chain

2021-10-11 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. > I don't feel it is different for OpenCL though... I am not in favour of > repeating the same functionality for every language since the requirement > will be likely identical. There is no timeline for when this functionality > will be dropped so we have to

[PATCH] D108367: [NFC] computeSPIRKernelABIInfo(): use SPIRABInfo

2021-09-13 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. In D108367#2966746 , @pekka.jaaskelainen wrote: > @Anastasia I used to have svn commit access, but haven't committed anything > for a long while in LLVM, so don't know if I can get them back to github by > just

[PATCH] D108367: [NFC] computeSPIRKernelABIInfo(): use SPIRABInfo

2021-08-26 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. @Anastasia I used to have svn commit access, but haven't committed anything for a long while in LLVM, so don't know if I can get them back to github by just asking. So, can you please commit these HIPSPV patches for us? Repository: rG LLVM Github

[PATCH] D104858: [OpenCL][ARM] Fix ICE when compiling a kernel

2021-07-06 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. > Ok, thanks for clarification. Does it mean there is something we need to add > to LLVM somewhere to make it work correctly? Would it be specific to Arm or > generally for all CPU targets? To my understanding, what is required is to keep SPIR_KERNEL CC

[PATCH] D104858: [OpenCL][ARM] Fix ICE when compiling a kernel

2021-07-05 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. > The reason why we would like to fix it is that upstream clang has a crash > currently when OpenCL sources are compiled for any Arm CPU: > https://bugs.llvm.org/show_bug.cgi?id=50841. Do you have any other > suggestions to avoid this problem? > > FYI clang

[PATCH] D104858: [OpenCL][ARM] Fix ICE when compiling a kernel

2021-06-30 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. Does this break clSetKernelArg() for ARM CPUs in PoCL? I believe so far it has worked for ARM - just wondering why you decide to drop it now? https://github.com/pocl/pocl/issues/1 CHANGES SINCE LAST ACTION https://reviews.llvm.org/D104858/new/

[PATCH] D52117: Generate llvm.loop.parallel_accesses instead of llvm.mem.parallel_loop_access metadata.

2018-10-04 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen accepted this revision. pekka.jaaskelainen added a comment. This revision is now accepted and ready to land. I glimpsed over this without spotting anything crucial. My Clang code base knowledge is a bit lightweight though so you might want to wait for an another reviewer. On

[PATCH] D29830: [OpenCL][Doc] Relase 4.0 notes for OpenCL

2017-02-13 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen accepted this revision. pekka.jaaskelainen added a comment. LGTM. https://reviews.llvm.org/D29830 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D28080: [Docs][OpenCL] Added OpenCL feature description to user manual.

2017-01-23 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. In https://reviews.llvm.org/D28080#653493, @Anastasia wrote: > > Also, for me the command without -emit-llvm doesn't output anything. > > What targets do you use? In this case I used only SPIR. I suppose this is fine as the concept of linking is unclear in

[PATCH] D28080: [Docs][OpenCL] Added OpenCL feature description to user manual.

2017-01-22 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added a comment. In https://reviews.llvm.org/D28080#651732, @Anastasia wrote: > @pekka.jaaskelainen, I just compiled the release 4.0 branch and it all works > for me as expected: > clang -cc1 -triple spir64-unknown-unknown test.cl > clang -target spir64-unknown-unknown

[PATCH] D28080: [Docs][OpenCL] Added OpenCL feature description to user manual.

2017-01-18 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added inline comments. Comment at: docs/UsersManual.rst:2065 + + $ clang -cc1 -triple spir64-unknown-unknown -cl-ext=-cl_khr_fp64 test.cl + Anastasia wrote: > pekka.jaaskelainen wrote: > > Is this correct? I cannot make it work: > > > >

[PATCH] D28080: [Docs][OpenCL] Added OpenCL feature description to user manual.

2017-01-17 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen requested changes to this revision. pekka.jaaskelainen added inline comments. This revision now requires changes to proceed. Comment at: docs/UsersManual.rst:2065 + + $ clang -cc1 -triple spir64-unknown-unknown -cl-ext=-cl_khr_fp64 test.cl +

[PATCH] D28080: [Docs][OpenCL] Added OpenCL feature description to user manual.

2017-01-13 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen accepted this revision. pekka.jaaskelainen added inline comments. This revision is now accepted and ready to land. Comment at: docs/UsersManual.rst:2130 + +- x86 is used by some implementations that are x86 compatible + (e.g. `POCL `_)

[PATCH] D28080: [Docs][OpenCL] Added OpenCL feature description to user manual.

2017-01-11 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen added inline comments. Comment at: docs/UsersManual.rst:2120 + that can be used across GPU toolchains. The implementation follows `the SPIR + specification `_. There are two flavors available + for 32 and 64 bits.

[PATCH] D28048: [OpenCL] Align fake address space map with the SPIR target maps.

2016-12-22 Thread Pekka Jääskeläinen via Phabricator via cfe-commits
pekka.jaaskelainen accepted this revision. pekka.jaaskelainen added a reviewer: pekka.jaaskelainen. pekka.jaaskelainen added a comment. This revision is now accepted and ready to land. In https://reviews.llvm.org/D28048#629569, @Anastasia wrote: > @pekka.jaaskelainen, I think you are using x86