Author: petarj
Date: Thu Mar 7 07:50:52 2019
New Revision: 355605
URL: http://llvm.org/viewvc/llvm-project?rev=355605&view=rev
Log:
[analyzer] handle modification of vars inside an expr with comma operator
We should track mutation of a variable within a comma operator expression.
Current code in
Author: petarj
Date: Thu Aug 24 09:06:30 2017
New Revision: 311669
URL: http://llvm.org/viewvc/llvm-project?rev=311669&view=rev
Log:
[mips] Introducing option -mabs=[legacy/2008]
In patch r205628 using abs.[ds] instruction is forced, as they should behave
in accordance with flags Has2008 and ABS2
Author: petarj
Date: Tue Aug 22 06:35:27 2017
New Revision: 311454
URL: http://llvm.org/viewvc/llvm-project?rev=311454&view=rev
Log:
[mips] Rename getSupportedNanEncoding() to getIEEE754Standard()
Rename the function getSupportedNanEncoding() to getIEEE754Standard(), since
this function will be u
Author: petarj
Date: Mon Jun 26 02:58:01 2017
New Revision: 306280
URL: http://llvm.org/viewvc/llvm-project?rev=306280&view=rev
Log:
[mips] Enable IAS by default for Android 64-bit MIPS target (N64)
IAS is already used for MIPS64 in majority of Android projects.
Android MIPS64 uses N64 ABI. Set I
le in test/CodeGen/mips-madd4.c
On Wed, Jun 7, 2017 at 11:57 AM, Petar Jovanovic via cfe-commits
wrote:
> Author: petarj
> Date: Wed Jun 7 13:57:56 2017
> New Revision: 304935
>
> URL: http://llvm.org/viewvc/llvm-project?rev=304935&view=rev
> Log:
> Revert r304929 [
Author: petarj
Date: Wed Jun 7 18:51:52 2017
New Revision: 304953
URL: http://llvm.org/viewvc/llvm-project?rev=304953&view=rev
Log:
Reapply r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
The test in r304929 broke multiple buildbots as it expected mips target to
be registered a
Author: petarj
Date: Wed Jun 7 13:57:56 2017
New Revision: 304935
URL: http://llvm.org/viewvc/llvm-project?rev=304935&view=rev
Log:
Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
Revert r304929 since the test broke buildbots.
Original commit:
[mips] Add runtime opti
Author: petarj
Date: Wed Jun 7 12:17:57 2017
New Revision: 304929
URL: http://llvm.org/viewvc/llvm-project?rev=304929&view=rev
Log:
[mips] Add runtime options to enable/disable madd.fmt and msub.fmt
Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
generation of madd.fmt
Author: petarj
Date: Wed May 10 09:28:18 2017
New Revision: 302670
URL: http://llvm.org/viewvc/llvm-project?rev=302670&view=rev
Log:
Reland: [mips] Impose a threshold for coercion of aggregates
Modified MipsABIInfo::classifyArgumentType so that it now coerces
aggregate structures only if
aggregates
On Tue, May 9, 2017 at 9:24 AM, Petar Jovanovic via cfe-commits
wrote:
> Author: petarj
> Date: Tue May 9 11:24:03 2017
> New Revision: 302547
>
> URL: http://llvm.org/viewvc/llvm-project?rev=302547&view=rev
> Log:
> [mips] Impose a threshold for coercion o
Author: petarj
Date: Tue May 9 12:20:06 2017
New Revision: 302555
URL: http://llvm.org/viewvc/llvm-project?rev=302555&view=rev
Log:
Revert r302547 ([mips] Impose a threshold for coercion of aggregates)
Reverting
Modified MipsABIInfo::classifyArgumentType so that it now coerces
aggregate stru
Author: petarj
Date: Tue May 9 11:24:03 2017
New Revision: 302547
URL: http://llvm.org/viewvc/llvm-project?rev=302547&view=rev
Log:
[mips] Impose a threshold for coercion of aggregates
Modified MipsABIInfo::classifyArgumentType so that it now coerces aggregate
structures only if the size of said
Author: petarj
Date: Fri Mar 31 11:16:43 2017
New Revision: 299229
URL: http://llvm.org/viewvc/llvm-project?rev=299229&view=rev
Log:
[mips][msa] Range adjustment for ldi_b builtin function operand
Reasoning behind this change was allowing the function to accept all values
from range [-128, 255] s
Author: petarj
Date: Fri Mar 10 11:51:01 2017
New Revision: 297485
URL: http://llvm.org/viewvc/llvm-project?rev=297485&view=rev
Log:
[mips][msa] Remove range checks for non-immediate sld.[bhwd] instructions
Removes immediate range checks for these instructions, since they have GPR
rt as their inp
This revision was automatically updated to reflect the committed changes.
Closed by commit rL269914: [Mips] Finetuning MIPS32 Android default variants
(authored by petarj).
Changed prior to commit:
http://reviews.llvm.org/D20345?vs=57543&id=57603#toc
Repository:
rL LLVM
http://reviews.llvm.
Author: petarj
Date: Wed May 18 07:46:06 2016
New Revision: 269914
URL: http://llvm.org/viewvc/llvm-project?rev=269914&view=rev
Log:
[Mips] Finetuning MIPS32 Android default variants
MIPS32 Android defaults to FPXX ("-fpxx").
MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg").
Differen
petarj created this revision.
petarj added a reviewer: atanasyan.
petarj added a subscriber: cfe-commits.
Herald added subscribers: srhines, danalbert, tberghammer.
MIPS32 Android defaults to FPXX ("-fpxx").
MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg").
http://reviews.llvm.org/D20
Author: petarj
Date: Tue May 17 05:46:10 2016
New Revision: 269754
URL: http://llvm.org/viewvc/llvm-project?rev=269754&view=rev
Log:
[Mips] Set mips32 as default CPU for MIPS32 Android
Change default CPU for MIPS32 Android. Now it is mips32 (rev1).
Differential Revision: http://reviews.llvm.org/
This revision was automatically updated to reflect the committed changes.
Closed by commit rL269754: [Mips] Set mips32 as default CPU for MIPS32 Android
(authored by petarj).
Changed prior to commit:
http://reviews.llvm.org/D20313?vs=57423&id=57454#toc
Repository:
rL LLVM
http://reviews.llv
petarj created this revision.
petarj added a reviewer: atanasyan.
petarj added a subscriber: cfe-commits.
Herald added subscribers: srhines, danalbert, tberghammer.
Change default CPU for MIPS32 Android. Now it is mips32 (rev1).
http://reviews.llvm.org/D20313
Files:
lib/Driver/Tools.cpp
test
Author: petarj
Date: Mon Dec 14 14:30:02 2015
New Revision: 255539
URL: http://llvm.org/viewvc/llvm-project?rev=255539&view=rev
Log:
[PowerPC] Fix test/CodeGen/ppc-sfvarargs
The issue seems to be that .ll file may either use number of register
value or alias %numUsedRegs, so the check needs to co
Author: petarj
Date: Mon Dec 14 13:22:35 2015
New Revision: 255533
URL: http://llvm.org/viewvc/llvm-project?rev=255533&view=rev
Log:
[PowerPC] Fix make-check issues
Previous change r255515 introduced a couple of issues likely caused by
a different configure setup.
Modified:
cfe/trunk/test/Co
This revision was automatically updated to reflect the committed changes.
Closed by commit rL255515: [Power PC] add soft float support for ppc32
(authored by petarj).
Changed prior to commit:
http://reviews.llvm.org/D13351?vs=41736&id=42733#toc
Repository:
rL LLVM
http://reviews.llvm.org/D1
Author: petarj
Date: Mon Dec 14 11:51:50 2015
New Revision: 255515
URL: http://llvm.org/viewvc/llvm-project?rev=255515&view=rev
Log:
[Power PC] add soft float support for ppc32
This patch enables soft float support for ppc32 architecture and fixes
the ABI for variadic functions. This is the first
This revision was automatically updated to reflect the committed changes.
Closed by commit rL254670: [PowerPC] Fix calculating address of arguments on
stack for variadic func (authored by petarj).
Changed prior to commit:
http://reviews.llvm.org/D14871?vs=41613&id=41826#toc
Repository:
rL LL
Author: petarj
Date: Thu Dec 3 18:26:47 2015
New Revision: 254670
URL: http://llvm.org/viewvc/llvm-project?rev=254670&view=rev
Log:
[PowerPC] Fix calculating address of arguments on stack for variadic func
Fix calculating address of arguments larger than 32 bit on stack for
variadic functions (r
Author: petarj
Date: Fri Nov 6 08:52:46 2015
New Revision: 252307
URL: http://llvm.org/viewvc/llvm-project?rev=252307&view=rev
Log:
Fix __builtin_signbit for ppcf128 type
Function__builtin_signbit returns wrong value for type ppcf128 on big endian
machines. This patch fixes how value is generate
This revision was automatically updated to reflect the committed changes.
Closed by commit rL252307: Fix __builtin_signbit for ppcf128 type (authored by
petarj).
Changed prior to commit:
http://reviews.llvm.org/D14149?vs=39513&id=39523#toc
Repository:
rL LLVM
http://reviews.llvm.org/D14149
petarj added a comment.
This patch can now be abandoned, as an updated version is available at
http://reviews.llvm.org/D12200 .
http://reviews.llvm.org/D4724
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This revision was automatically updated to reflect the committed changes.
Closed by commit rL244675: [MIPS] Use arch values for lock-free atomic
operations (authored by petarj).
Changed prior to commit:
http://reviews.llvm.org/D11949?vs=31830&id=31864#toc
Repository:
rL LLVM
http://reviews.
Author: petarj
Date: Tue Aug 11 16:27:39 2015
New Revision: 244675
URL: http://llvm.org/viewvc/llvm-project?rev=244675&view=rev
Log:
[MIPS] Use arch values for lock-free atomic operations
Let NaClMips32ELTargetInfo inherit arch values for maximum width lock-free
atomic operations.
Differential R
petarj created this revision.
petarj added a reviewer: dschuff.
petarj added a subscriber: cfe-commits.
Herald added subscribers: dschuff, jfb.
Let NaClMips32ELTargetInfo inherit arch values for maximum width lock-free
atomic operations.
http://reviews.llvm.org/D11949
Files:
lib/Basic/Targets
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