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shiltian wrote:
> Bit of a hack it seems
It is a hack (or workaround). The correct approach would be either to redesign
the lowering of LDS, or create another flavor of ThinLTO. Neither of it can be
done in a reasonably short amount of time.
https://github.com/llvm/llvm-project/pull/144914
__
shiltian wrote:
* **#144914** https://app.graphite.dev/github/pr/llvm/llvm-project/144914?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
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On AMDGPU, we need an extra argument `-avail-extern-gv-in-addrspace-to-local=3`
to privatize LDS global variables when ThinLTO is enabled.
>From bf7b936421379ae7e043360c6515136660e2e550 Mon Sep 17 00:00:00 2001
@@ -417,3 +417,15 @@ void HIPAMDToolChain::checkTargetID(
getDriver().Diag(clang::diag::err_drv_bad_target_id)
<< *PTID.OptionalTargetID;
}
+
+SPIRVAMDToolChain::SPIRVAMDToolChain(const Driver &D,
+ const llvm::Triple &Triple,
+
shiltian wrote:
No test is needed?
https://github.com/llvm/llvm-project/pull/144570
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shiltian wrote:
> I assume AMDGPU does not support unaligned loads
We do support unaligned access IIUC, and it is actually required by HSA ABI. CC
@arsenm
https://github.com/llvm/llvm-project/pull/133301
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CI will tell us whether this is broken or not. :-)
https://github.com/llvm/llvm-project/pull/144285
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shiltian wrote:
Can you also remove all `t`? They don't seem to be necessary here.
https://github.com/llvm/llvm-project/pull/138141
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@@ -0,0 +1,170 @@
+//===-- AMDGPUTargetVerifier.cpp - AMDGPU ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,170 @@
+//===-- AMDGPUTargetVerifier.cpp - AMDGPU ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/shiltian approved this pull request.
LGTM as long as it builds successfully. I tried something similar in a few
files before, but it ended up breaking the build, so I gave up. :-)
https://github.com/llvm/llvm-project/pull/142296
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LGTM as long as it doesn't break the build.
https://github.com/llvm/llvm-project/pull/142295
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shiltian wrote:
Why did we have `t` in some of the builtins in the first place…
https://github.com/llvm/llvm-project/pull/138141
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@@ -11762,52 +11762,98 @@ bool
OpenMPAtomicCompareChecker::checkCondUpdateStmt(IfStmt *S,
X = BO->getLHS();
- auto *Cond = dyn_cast(S->getCond());
- if (!Cond) {
-ErrorInfo.Error = ErrorTy::NotABinaryOp;
-ErrorInfo.ErrorLoc = ErrorInfo.NoteLoc = S->getCond()->get
@@ -11762,52 +11762,98 @@ bool
OpenMPAtomicCompareChecker::checkCondUpdateStmt(IfStmt *S,
X = BO->getLHS();
- auto *Cond = dyn_cast(S->getCond());
- if (!Cond) {
-ErrorInfo.Error = ErrorTy::NotABinaryOp;
-ErrorInfo.ErrorLoc = ErrorInfo.NoteLoc = S->getCond()->get
@@ -11762,52 +11762,98 @@ bool
OpenMPAtomicCompareChecker::checkCondUpdateStmt(IfStmt *S,
X = BO->getLHS();
- auto *Cond = dyn_cast(S->getCond());
- if (!Cond) {
-ErrorInfo.Error = ErrorTy::NotABinaryOp;
-ErrorInfo.ErrorLoc = ErrorInfo.NoteLoc = S->getCond()->get
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@@ -683,6 +683,30 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateInsertElement(I0, A, 1);
}
+ case AMDGPU::BI__builtin_amdgcn_image_load_2d_f32_i32: {
+llvm::Type *RetTy = llvm::Type::getFloatTy(Builder.getContext());
+
@@ -635,5 +635,10 @@ TARGET_BUILTIN(__builtin_amdgcn_bitop3_b16, "IUi",
"nc", "bitop3-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_bf16_f32, "V2yV2yfUiIb", "nc",
"f32-to-f16bf16-cvt-sr-insts")
TARGET_BUILTIN(__builtin_amdgcn_cvt_sr_f16_f32, "V2hV2hfUiIb", "nc",
"f32-to-
@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown %s -emit-llvm -o - |
FileCheck %s
shiltian wrote:
use right triple `amdgcn-amd-amdhsa` pls
@@ -683,6 +683,30 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateInsertElement(I0, A, 1);
}
+ case AMDGPU::BI__builtin_amdgcn_image_load_2d_f32_i32: {
+llvm::Type *RetTy = llvm::Type::getFloatTy(Builder.getContext());
@@ -683,6 +683,30 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateInsertElement(I0, A, 1);
}
+ case AMDGPU::BI__builtin_amdgcn_image_load_2d_f32_i32: {
+llvm::Type *RetTy = llvm::Type::getFloatTy(Builder.getContext());
+
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shiltian wrote:
> comgr is the JIT compiler for HIP on ROCm. comgr uses -nogpuinc by default.
> However, some users of comgr need to override that so that comgr enables the
> wrapper headers. We cannot simply let comgr stop using -nogpuinc by default
> since it will break existing comgr users.
shiltian wrote:
Hmm, in what cases `-nogpuinc` is added but we don't actually want it?
https://github.com/llvm/llvm-project/pull/140106
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@@ -14924,8 +14924,25 @@ StmtResult
SemaOpenMP::ActOnOpenMPUnrollDirective(ArrayRef Clauses,
SourceLocation FactorLoc;
if (Expr *FactorVal = PartialClause->getFactor();
FactorVal && !FactorVal->containsErrors()) {
+if (!VerifyPositiveIntegerConstantInClause(Facto
@@ -14924,8 +14924,25 @@ StmtResult
SemaOpenMP::ActOnOpenMPUnrollDirective(ArrayRef Clauses,
SourceLocation FactorLoc;
if (Expr *FactorVal = PartialClause->getFactor();
FactorVal && !FactorVal->containsErrors()) {
+if (!VerifyPositiveIntegerConstantInClause(Facto
@@ -14924,8 +14924,25 @@ StmtResult
SemaOpenMP::ActOnOpenMPUnrollDirective(ArrayRef Clauses,
SourceLocation FactorLoc;
if (Expr *FactorVal = PartialClause->getFactor();
FactorVal && !FactorVal->containsErrors()) {
+if (!VerifyPositiveIntegerConstantInClause(Facto
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@@ -0,0 +1,84 @@
+//===-- llvm/Target/TargetVerifier.h - LLVM IR Target Verifier --*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,84 @@
+//===-- llvm/Target/TargetVerifier.h - LLVM IR Target Verifier --*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -0,0 +1,84 @@
+//===-- llvm/Target/TargetVerifier.h - LLVM IR Target Verifier --*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -481,6 +481,9 @@ static cl::opt HasClosedWorldAssumption(
cl::desc("Whether has closed-world assumption at link time"),
cl::init(false), cl::Hidden);
+static cl::opt VerifyTarget("verify-tgt",
shiltian wrote:
`verify-tgt` is too broad. I'd add an `
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shiltian wrote:
* **#138547** https://app.graphite.dev/github/pr/llvm/llvm-project/138547?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
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None
Rate limit · GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial
shiltian wrote:
I got it that you are trying to make it generic. That's why I didn’t roll back
to using builtin bitcode as we did before. However there is one limitation that
we can't really work around, which is the fact that we don't support ABI
linking. This is not a new topic at all and wh
shiltian wrote:
> also seeing
>
> "PluginInterface" error: Failure to look up global address: Error in
> hsa_executable_get_symbol_by_name(grid_points):
> HSA_STATUS_ERROR_INVALID_SYMBOL_NAME: There is no symbol with the given name.
>
> omptarget error: Failed to load symbol grid_points
>
>
shiltian wrote:
I don't think OpenMP is more special than HIP here. Anything exposed to the
host should not be internalized. In addition, OpenMP actually also heavily uses
internalization as well in OpenMPOpt. It is likely that this change exposes
something bad in the downstream.
The motivati
@@ -9284,6 +9284,12 @@ void LinkerWrapper::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back(Args.MakeArgString(
"--device-linker=" + TC->getTripleString() + "=" + Arg));
+ // Enable internalization for AMDGPU.
+ if (TC->getTrip
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https://github.com/llvm/llvm-project/pull/138365
>From c9a8e6e2d67d8e7d029e58402c17d8c9419cd028 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 2 May 2025 19:41:11 -0400
Subject: [PATCH] [Clang][Driver] Enable internalization by default for AMDGPU
---
shiltian wrote:
* **#138365** https://app.graphite.dev/github/pr/llvm/llvm-project/138365?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
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None
>From acc89cf6a85a8fb758b528a4e2ae587fccd61ce5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 2 May 2025 19:41:11 -0400
Subject: [PATCH] [Clang][Driver] Enable internalization by default for AMDGPU
@@ -2641,6 +2641,28 @@ def int_amdgcn_perm :
// GFX9 Intrinsics
//===--===//
+/// This is a general-purpose intrinsic for all operations that take a pointer
+/// a base location in LDS, and a data size and us
@@ -0,0 +1,144 @@
+//===-- TargetVerifier.cpp - LLVM IR Target Verifier *- C++
-*-===//
+
+/ Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+/ See https://llvm.org/LICENSE.txt for license information.
+/ SPDX-License
@@ -172,6 +172,13 @@ class PassBuilder {
/// additional analyses.
void registerLoopAnalyses(LoopAnalysisManager &LAM);
+ /// Registers all available verifier passes.
+ ///
+ /// This is an interface that can be used to populate a
+ /// \c ModuleAnalysisManager with all
@@ -0,0 +1,34 @@
+set(LLVM_LINK_COMPONENTS
shiltian wrote:
I don't know why we want a dedicated tool for this
https://github.com/llvm/llvm-project/pull/123609
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htt
@@ -841,6 +857,11 @@ class PassBuilder {
// Callbacks to parse `filter` parameter in register allocation passes
SmallVector, 2>
RegClassFilterParsingCallbacks;
+ // Verifier callbacks
+ SmallVector, 2>
+ VerifierCallbacks;
+ SmallVector, 2>
+ FnVerifierCa
@@ -0,0 +1,84 @@
+//===-- llvm/Target/TargetVerifier.h - LLVM IR Target Verifier ---*- C++
-*-===//
shiltian wrote:
What's the value of this interface class instead of just making those target
verifier a module/function pass?
https://github.com/llvm/llvm-proje
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu tahiti -S
-verify -o - %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu bonaire -S
-verify -o - %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu carrizo -S
-verify
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu tahiti -S
-verify -o - %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu bonaire -S
-verify -o - %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu carrizo -S
-verify
@@ -0,0 +1,12 @@
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu tahiti -S
-verify -o - %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu bonaire -S
-verify -o - %s
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu carrizo -S
-verify
shiltian wrote:
Isn't it similar to what @krzysz00 is doing in another PR to some extent?
https://github.com/llvm/llvm-project/pull/137678
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@@ -146,3 +146,8 @@
#pragma OPENCL EXTENSION cl_khr_subgroups: enable
// expected-warning@-1{{unsupported OpenCL extension 'cl_khr_subgroups' -
ignoring}}
+#ifdef __opencl_c_generic_address_space
+#error "Incorrect __opencl_c_generic_address_space define"
shi
@@ -0,0 +1,75 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck
-check-prefixes=GFX950,GFX950-SDAG %s
+; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=g
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/137425
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/137425
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@@ -0,0 +1,144 @@
+//===-- TargetVerifier.cpp - LLVM IR Target Verifier *- C++
-*-===//
+
+/ Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+/ See https://llvm.org/LICENSE.txt for license information.
+/ SPDX-License
https://github.com/shiltian approved this pull request.
The AMDGPU part looks good. Not sure if CUDA supports it. @Artem-B
https://github.com/llvm/llvm-project/pull/127082
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/137070
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@@ -423,8 +423,8 @@ static void instantiateOMPDeclareVariantAttr(
auto *FD = cast(New);
auto *ThisContext = dyn_cast_or_null(FD->getDeclContext());
- auto &&SubstExpr = [FD, ThisContext, &S, &TemplateArgs](Expr *E) {
-if (auto *DRE = dyn_cast(E->IgnoreParenImpCasts())
shiltian wrote:
Hmm, this PR is much shorter than it used to be.
https://github.com/llvm/llvm-project/pull/131838
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@@ -0,0 +1,175 @@
+//===--- llvm-isel-fuzzer.cpp - Fuzzer for instruction selection
--===//
shiltian wrote:
also, I wonder why do we need an extra binary for this?
https://github.com/llvm/llvm-project/pull/123609
@@ -0,0 +1,175 @@
+//===--- llvm-isel-fuzzer.cpp - Fuzzer for instruction selection
--===//
shiltian wrote:
the file name doesn't match the actual file name
https://github.com/llvm/llvm-project/pull/123609
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@@ -0,0 +1,175 @@
+#include "llvm/Target/TargetVerify/AMDGPUTargetVerifier.h"
shiltian wrote:
This file doesn't have LLVM copyright header
https://github.com/llvm/llvm-project/pull/123609
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c
@@ -2040,6 +2043,8 @@ void AMDGPUCodeGenPassBuilder::addIRPasses(AddIRPass
&addPass) const {
// but EarlyCSE can do neither of them.
if (isPassEnabled(EnableScalarIRPasses))
addEarlyCSEOrGVNPass(addPass);
+
+ addPass(AMDGPUTargetVerifierPass());
shilt
@@ -1298,6 +1299,8 @@ void AMDGPUPassConfig::addIRPasses() {
addPass(createLICMPass());
}
+ //addPass(AMDGPUTargetVerifierPass());
shiltian wrote:
left over
https://github.com/llvm/llvm-project/pull/123609
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