[PATCH] D59310: [PowerPC] Fix issue with inline asm - soft float mode

2019-04-02 Thread Strahinja Petrovic via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rC357466: [PowerPC] Fix issue with inline asm - soft float mode (authored by spetrovic, committed by ). Herald added a project: clang. Herald added a subscriber: cfe-commits. Changed prior to commit: http

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2018-05-10 Thread Strahinja Petrovic via Phabricator via cfe-commits
This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rL331979: This patch provides that bitfields are splitted even in case (authored by spetrovic, committed by ). Herald added

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2018-04-25 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 143918. spetrovic added a comment. Comments addressed https://reviews.llvm.org/D39053 Files: include/clang/Driver/Options.td lib/CodeGen/CGRecordLayoutBuilder.cpp test/CodeGenCXX/finegrain-bitfield-type.cpp Index: test/CodeGenCXX/finegrain-bitfield

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2018-04-16 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping https://reviews.llvm.org/D39053 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D44921: [PowerPC] Option for secure plt mode

2018-04-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rL329795: [PowerPC] Option for secure plt mode (authored by spetrovic, committed by ). Herald added a subscriber: llvm-commits. Changed prior to commit: https://reviews.llvm.org/D44921?vs=140060&id=141976

[PATCH] D44921: [PowerPC] Option for secure plt mode

2018-04-04 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. -mbss-plt is currently default in LLVM, once secure plt support is finished we can set secure plt as default in LLVM, but not for now. https://reviews.llvm.org/D44921 ___ cfe-commits mailing list cfe-commits@lists.llvm.or

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2018-03-29 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping https://reviews.llvm.org/D39053 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D44921: [PowerPC] Option for secure plt mode

2018-03-28 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. Yes, secure PLT is PowerPC specific feature. https://reviews.llvm.org/D44921 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D44921: [PowerPC] Option for secure plt mode

2018-03-28 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added inline comments. Comment at: include/clang/Driver/Options.td:1941 def mno_vsx : Flag<["-"], "mno-vsx">, Group; +def msecure_plt : Flag<["-"], "msecure-plt">, Group; def mpower8_vector : Flag<["-"], "mpower8-vector">, nemanjai wrote: > Do we not

[PATCH] D44921: [PowerPC] Option for secure plt mode

2018-03-28 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 140060. https://reviews.llvm.org/D44921 Files: include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/PPC.cpp lib/Driver/ToolChains/Arch/PPC.h test/Driver/ppc-features.cpp Index: test/Driver/ppc-features.cpp ===

[PATCH] D44921: [PowerPC] Option for secure plt mode

2018-03-27 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic created this revision. spetrovic added reviewers: jhibbits, nemanjai. Herald added a subscriber: kbarton. This patch enables option for secure plt mode in clang (-msecure-plt). This feature is supported in backend also (https://reviews.llvm.org/D42112). https://reviews.llvm.org/D44921

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2017-12-21 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping https://reviews.llvm.org/D39053 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2017-12-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping https://reviews.llvm.org/D39053 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2017-11-29 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. I tried to compile some important libraries for X86 and MIPS64 within Chromium with clang/llvm. I have compared results between LLVM trunk, and LLVM trunk with my patch. There is code size improvement on many libraries, here are some results: - X86 libframe

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2017-11-07 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping https://reviews.llvm.org/D39053 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2017-11-01 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. I was looking if I can reslove this problem in backend. Example: C code: typedef struct { unsigned int f1 : 28; unsigned int f2 : 4; unsigned int f3 : 12; } S5; void foo(S5 *cmd) { cmd->f3 = 5; } . ll file (without the patch): %struct

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2017-10-25 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. Well, basically I'm just expanding the existing algorithm, why should we split fields just in case when current field is integer, I'm not resolving specific problem with unaligned loads/stores on MIPS. In this example: typedef struct { unsigned int f1 : 28; unsig

[PATCH] D39053: [Bitfield] Add more cases to making the bitfield a separate location

2017-10-18 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic created this revision. Herald added subscribers: arichardson, sdardis. This patch provides that bitfields are splitted even in case when current field is not legal integer type. For Example, struct S3 { unsigned long a1:28; unsigned long a2:4; unsigned long a3:12; }; struct S4

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-12 Thread Strahinja Petrovic via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rL313018: [ARM] Option for reading thread pointer from coprocessor register (authored by spetrovic). Changed prior to commit: https://reviews.llvm.org/D34878?vs=114618&id=114792#toc Repository: rL LLVM

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 114618. spetrovic added a comment. Indentations fixed. https://reviews.llvm.org/D34878 Files: include/clang/Basic/DiagnosticDriverKinds.td include/clang/Driver/CC1Options.td include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/ARM.cpp lib/

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. Thanks for the review! I will check indentations with clang format. https://reviews.llvm.org/D34878 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 114582. https://reviews.llvm.org/D34878 Files: include/clang/Basic/DiagnosticDriverKinds.td include/clang/Driver/CC1Options.td include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/ARM.cpp lib/Driver/ToolChains/Arch/ARM.h test/Driver/clang-

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added inline comments. Comment at: lib/Driver/ToolChains/Arch/ARM.cpp:149-150 +else + D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args); + } + return ReadTPMode::Soft; kristof.beyls wrote: > a return ReadTPMode::Invalid is missing her

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. Comments addressed. https://reviews.llvm.org/D34878 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 114573. https://reviews.llvm.org/D34878 Files: include/clang/Basic/DiagnosticDriverKinds.td include/clang/Driver/CC1Options.td include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/ARM.cpp lib/Driver/ToolChains/Arch/ARM.h test/Driver/clang-

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-08 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 114329. spetrovic marked 3 inline comments as done. https://reviews.llvm.org/D34878 Files: include/clang/Basic/DiagnosticDriverKinds.td include/clang/Driver/CC1Options.td include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/ARM.cpp lib/Drive

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-09-08 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic marked 3 inline comments as done. spetrovic added inline comments. Comment at: include/clang/Driver/Options.td:1664-1665 HelpText<"Allow generation of data access to code sections (ARM only)">; +def mtp_mode_EQ : Joined<["-"], "mtp=">, Group, Values<"soft, cp15">, +

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-08-25 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping Repository: rL LLVM https://reviews.llvm.org/D34878 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-08-03 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added inline comments. Comment at: lib/Driver/ToolChains/Arch/ARM.cpp:136 +if (ThreadPointer == ReadTPMode::Invalid && +!StringRef(A->getValue()).empty()) { + D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args); bruno wrote: > Wha

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-08-03 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 109571. spetrovic marked 2 inline comments as done. Repository: rL LLVM https://reviews.llvm.org/D34878 Files: include/clang/Basic/DiagnosticDriverKinds.td include/clang/Driver/CC1Options.td include/clang/Driver/Options.td lib/Driver/ToolChains/A

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-08-01 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. Comments addressed. https://reviews.llvm.org/D34878 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-08-01 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic updated this revision to Diff 109088. https://reviews.llvm.org/D34878 Files: include/clang/Basic/DiagnosticDriverKinds.td include/clang/Driver/CC1Options.td include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/ARM.cpp lib/Driver/ToolChains/Arch/ARM.h lib/Driver/ToolCha

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-07-25 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. Hi Bruno, Yes, GCC has similar option (-mtp=soft/hard), but name is not same. I put the same option name as in backend (https://reviews.llvm.org/D34408). https://reviews.llvm.org/D34878 ___ cfe-commits mailing list cfe-c

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-07-24 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping https://reviews.llvm.org/D34878 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-07-11 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic added a comment. ping https://reviews.llvm.org/D34878 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D34878: [ARM] Option for reading thread pointer from coprocessor register

2017-06-30 Thread Strahinja Petrovic via Phabricator via cfe-commits
spetrovic created this revision. Herald added subscribers: kristof.beyls, javed.absar, aemerson. This patch enables option for reading thread pointer directly from coprocessor register (-mread-tp-hard). This option is supported in llc also ( https://reviews.llvm.org/D34408 ). https://reviews.l