tomtor wrote:
https://github.com/llvm/llvm-project/commit/62735d26b1a1bdb5d03c594c958a0d01a4f8b486
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/
tomtor wrote:
FYI, the code generation regression is no longer in current nigthly, it was
only in 2025-08-07.
The day I was testing this PR :( Bad timing...
```
searched toolchains ec7c02612527d185c379900b613311bc1dcbf7dc through
7d82b83ed57d188ab3f2441a765a6419685a88a3
tomtor wrote:
We get a build error with lld @benshi001
The windows build went fine.
I think I have to add a .cpp definition
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org
tomtor wrote:
I just checked the latest Rust nightly. It produces now also the longer
version! So it is a Rust regression. This PR is fine.
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https
tomtor wrote:
```
01f6 :
1f6: ef 92 pushr14
1f8: 0f 93 pushr16
1fa: 1f 93 pushr17
1fc: 8a 30 cpi r24, 0x0A ; 10
1fe: 91 05 cpc r25, r1
200: c0 f0 brcs.+48; 0x232 <.Lname69+0
tomtor wrote:
I am currently testing this PR in a Rust build and I am seeing some changes in
generated code which I want to study before a merge of this PR.
Rust normally uses a patched llvm and I am directly using this PR so that could
be the cause but I want to check that first. @Patryk27
@@ -0,0 +1,95 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O=3 -mtriple=avr-none -mcpu=attiny85 -verify-machineinstrs |
FileCheck %s
+
+declare dso_local void @foo(i16 noundef) addrspace(1)
+@ci = dso_local global [30 x i16]
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -112,8 +112,8 @@ while.end:; preds =
%while.body, %entry
define void @store16predec(ptr %x, i16 %y) {
; CHECK-LABEL: store16predec:
-; CHECK: st -{{[XYZ]}}, {{.*}}
-; CHECK: st -{{[XYZ]}}, {{.*}}
+; TODO: st -{{[XYZ]}}, {{.*}}
--
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/9] Improve AVR loop code generation
---
clang/lib/Basic/Targets
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -98,9 +98,34 @@ while.end:; preds =
%while.body, %entry
ret i16 %r.0.lcssa
}
+define i16 @load16postincloopreduce(ptr %p, i16 %cnt) {
+; CHECK-LABEL: load16postincloopreduce:
+; CHECK: ld {{.*}}, {{[XYZ]}}+
+; CHECK: ld {{.*}}, {{[
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -0,0 +1,95 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O=3 -mtriple=avr-none -mcpu=attiny85 -verify-machineinstrs |
FileCheck %s
+
+declare dso_local void @foo(i16 noundef) addrspace(1)
+@ci = dso_local global [30 x i16]
@@ -0,0 +1,56 @@
+//===- AVRTargetTransformInfo.h - AVR specific TTI -*- C++ -*-===//
tomtor wrote:
Fixed
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/8] Improve AVR loop code generation
---
clang/lib/Basic/Targets
@@ -0,0 +1,56 @@
+//===- AVRTargetTransformInfo.h - AVR specific TTI -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.
@@ -112,8 +112,8 @@ while.end:; preds =
%while.body, %entry
define void @store16predec(ptr %x, i16 %y) {
; CHECK-LABEL: store16predec:
-; CHECK: st -{{[XYZ]}}, {{.*}}
-; CHECK: st -{{[XYZ]}}, {{.*}}
+; TODO: st -{{[XYZ]}}, {{.*}}
--
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/7] Improve AVR loop code generation
---
clang/lib/Basic/Targets
@@ -57,7 +57,8 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public
TargetInfo {
Int16Type = SignedInt;
Char32Type = UnsignedLong;
SigAtomicType = SignedChar;
-resetDataLayout("e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8");
+resetDataLayout(
+
@@ -0,0 +1,56 @@
+//===- AVRTargetTransformInfo.h - AVR specific TTI -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.
@@ -0,0 +1,56 @@
+//===- AVRTargetTransformInfo.h - AVR specific TTI -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/6] Improve AVR loop code generation
---
clang/lib/Basic/Targets
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -0,0 +1,68 @@
+//===- AVRTargetTransformInfo.h - AVR specific TTI -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/5] Improve AVR loop code generation
---
clang/lib/Basic/Targets
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/4] Improve AVR loop code generation
---
clang/lib/Basic/Targets
@@ -76,26 +76,26 @@ while.end:; preds =
%while.body, %entry
ret i8 %r.0.lcssa
}
-define i16 @load16postinc(ptr %x, i16 %y) {
+define i16 @load16postinc(ptr %p, i16 %cnt) {
; CHECK-LABEL: load16postinc:
; CHECK: ld {{.*}}, {{[XYZ]}}+
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/152028
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -57,7 +57,8 @@ class LLVM_LIBRARY_VISIBILITY AVRTargetInfo : public
TargetInfo {
Int16Type = SignedInt;
Char32Type = UnsignedLong;
SigAtomicType = SignedChar;
-resetDataLayout("e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8");
+resetDataLayout(
+
@@ -0,0 +1,68 @@
+//===- AVRTargetTransformInfo.h - AVR specific TTI -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.
tomtor wrote:
loop-reduce does not preserve predecrement operations in loops which it cannot
optimize.
This is a non AVR specific bug/issue, but on architectures with rich addressing
modes it is hidden (a scaled index is used on Intel/ARM) and RISCV has no
post/pre addressing.
In functions wh
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/3] Improve AVR loop code generation
---
clang/lib/Basic/Targets
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/152028
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/2] Improve AVR loop code generation
---
clang/lib/Basic/Targets
https://github.com/tomtor created
https://github.com/llvm/llvm-project/pull/152028
Fix https://github.com/llvm/llvm-project/issues/151080
>From c5206367a672d52b6761490b144e0221f8dafcf3 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Sun, 3 Aug 2025 09:15:58 +0200
Subject: [PATCH 1/2] Improv
tomtor wrote:
I did not request a review from code owners? Did I hit a button by accident?
https://github.com/llvm/llvm-project/pull/146244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-comm
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/146244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
tomtor wrote:
I removed the new flags, these can be simulated with `-T` and other linker
flags by a user.
https://github.com/llvm/llvm-project/pull/146244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/l
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/146244
>From 137c1824febc34b1e34b5b35fc7eefc073eec6fa Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Fri, 27 Jun 2025 17:16:35 +0200
Subject: [PATCH 1/3] [AVR] Handle mapped RO data for newer devices
---
clang/inc
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/146244
>From 137c1824febc34b1e34b5b35fc7eefc073eec6fa Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Fri, 27 Jun 2025 17:16:35 +0200
Subject: [PATCH 1/2] [AVR] Handle mapped RO data for newer devices
---
clang/inc
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/146244
>From 137c1824febc34b1e34b5b35fc7eefc073eec6fa Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Fri, 27 Jun 2025 17:16:35 +0200
Subject: [PATCH 01/11] [AVR] Handle mapped RO data for newer devices
---
clang/i
@@ -651,8 +651,19 @@ void AVR::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
// This is almost always required because otherwise avr-ld
// will assume 'avr2' and warn about the program being larger
// than the bare minimum supports.
- if (Linker.find("avr-ld
tomtor wrote:
Some background info:
https://gcc.gnu.org/gcc-14/changes.html#avr
https://github.com/llvm/llvm-project/pull/146244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
tomtor wrote:
@benshi There is an alternative to new driver options:
https://github.com/llvm/llvm-project/pull/146244/files#r2179646110
That would be a minimal change, and a general improvement giving users more
options to tune the linking.
https://github.com/llvm/llvm-project/pull/146244
___
@@ -651,8 +651,19 @@ void AVR::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
// This is almost always required because otherwise avr-ld
// will assume 'avr2' and warn about the program being larger
// than the bare minimum supports.
- if (Linker.find("avr-ld
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/146244
>From a08a6a071db9bf553bb64fcfa39d2ed80e000fe6 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Fri, 27 Jun 2025 17:16:35 +0200
Subject: [PATCH 1/2] [AVR] Handle mapped RO data for newer devices
---
clang/inc
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/146244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
tomtor wrote:
> I do not think this PR is necessary, since there is no bug, I have explained
> in #146537.
You are right, so this PR is not a bug fix, but just adding features and a
minor optimization.
https://github.com/llvm/llvm-project/pull/146244
_
tomtor wrote:
> > @benshi001 @Patryk27 Could you review this?
>
> As I have told you several days ago, each functional change requires unit
> tests, your PR involves
>
> 1. clang driver
>
> 2. clang builtin macro
>
> 3. avr backend codegen
>
>
> Each part needs unit tests to sh
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/146244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
tomtor wrote:
@benshi001 @Patryk27 Could you review this?
https://github.com/llvm/llvm-project/pull/146244
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/146244
>From a08a6a071db9bf553bb64fcfa39d2ed80e000fe6 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Fri, 27 Jun 2025 17:16:35 +0200
Subject: [PATCH] [AVR] Handle mapped RO data for newer devices
---
clang/include
https://github.com/tomtor created
https://github.com/llvm/llvm-project/pull/146244
Newer AVR devices map (part of the) flash to a 32kB window at 0x8000 in the
data/IO space.
The linker correctly loads readonly data at 0x8000, but we currently always
pull in `__do_copy_data` when we encounter
tomtor wrote:
For future reference, the avr16/avr32 devices do have SPM and SPMX features,
but the current xmega3 definition has not.
Xmega3 is also used for modern attiny series which do not have SPM(X), so that
is correct.
The avr64 devices use xmega2 which has SPM(X) defined, so that is al
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/144229
>From 57a30b4bfd87a8389ab042b2c9184a59bf7f4519 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH 1/9] Add support for many new AVR mcus like AVR128DB28
---
clang
tomtor wrote:
Double checking
https://onlinedocs.microchip.com/oxy/GUID-0B644D8F-67E7-49E6-82C9-1B2B9ABE6A0D-en-US-23/GUID-33953345-30E8-49BC-89A0-9734DC6EA5B9.html
https://github.com/llvm/llvm-project/pull/144229
___
cfe-commits mailing list
cfe-comm
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/144229
>From 57a30b4bfd87a8389ab042b2c9184a59bf7f4519 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH 1/8] Add support for many new AVR mcus like AVR128DB28
---
clang
tomtor wrote:
In the CI check I find one ` FAIL:`
```
2025-06-15T07:21:48.1250696Z FAIL: Flang :: Semantics/modfile76.F90 (3383 of
3529)
2025-06-15T07:21:48.1251772Z TEST 'Flang ::
Semantics/modfile76.F90' FAILED
```
but this is unrelated? (Flang, for
tomtor wrote:
@kazutakahirata Thanks again!
I noticed the failling check but could not find the cause in the enormous log
file. Wondered if it could be caused by a timeout on the build, but it was this
failing check.
Added new test patterns for the new MCUs.
Did not manage to run these tests
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/144229
>From 57a30b4bfd87a8389ab042b2c9184a59bf7f4519 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH 1/7] Add support for many new AVR mcus like AVR128DB28
---
clang
tomtor wrote:
My local tree build OK...
https://github.com/llvm/llvm-project/pull/144229
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
tomtor wrote:
> LGTM. Thank you for updating the patch!
Thanks! I am now rebuilding after:
`cmake -S llvm -B build -G Ninja`
https://github.com/llvm/llvm-project/pull/144229
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llv
tomtor wrote:
@Patryk27 @benshi001 @kazutakahirata
Oops, as you noticed I did not recompile after adding the avr64* models.
Sorry for that, changes are almost never trivial
Hope all is ok now, my local compile did compile my files, but ended with:
cc1plus: fatal error:
/home/tom/src/rust
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/144229
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor created
https://github.com/llvm/llvm-project/pull/144229
https://github.com/llvm/llvm-project/pull/143914 failed to compile due to an
unchecked late change. Sorry for that.
Added the missing XMEGA2 definition.
>From 57a30b4bfd87a8389ab042b2c9184a59bf7f4519 Mon Sep
tomtor wrote:
Removed EIJMP for avr128 devices, see:
https://onlinedocs.microchip.com/oxy/GUID-0B644D8F-67E7-49E6-82C9-1B2B9ABE6A0D-en-US-23/GUID-3F578DEB-6EE6-4081-AEF2-B505FF2AE8A5.html
https://github.com/llvm/llvm-project/pull/143914
___
cfe-commit
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/143914
>From 3e070f4aa1e105a4f5b486b662e481195a0a4608 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH 1/5] Add support for many new AVR mcus like AVR128DB28
---
clang
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/143914
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/143914
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/143914
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/143914
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/tomtor edited
https://github.com/llvm/llvm-project/pull/143914
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -326,8 +326,78 @@ constexpr struct {
{"attiny1624", "avrxmega3", "avrxmega3", 0x803800},
{"attiny1626", "avrxmega3", "avrxmega3", 0x803800},
{"attiny1627", "avrxmega3", "avrxmega3", 0x803800},
+{"attiny3224", "avrxmega3", "avrxmega3", 0x803400},
+{"attiny
@@ -336,6 +336,9 @@ static MCUInfo AVRMcus[] = {
{"attiny1624", "__AVR_ATtiny1624__", "103", 1},
{"attiny1626", "__AVR_ATtiny1626__", "103", 1},
{"attiny1627", "__AVR_ATtiny1627__", "103", 1},
+{"attiny3224", "__AVR_ATtiny1624__", "103", 1},
tom
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/143914
>From 3e070f4aa1e105a4f5b486b662e481195a0a4608 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH 1/4] Add support for many new AVR mcus like AVR128DB28
---
clang
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/143914
>From 3e070f4aa1e105a4f5b486b662e481195a0a4608 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH 1/3] Add support for many new AVR mcus like AVR128DB28
---
clang
https://github.com/tomtor updated
https://github.com/llvm/llvm-project/pull/143914
>From 3e070f4aa1e105a4f5b486b662e481195a0a4608 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH 1/2] Add support for many new AVR mcus like AVR128DB28
---
clang
https://github.com/tomtor created
https://github.com/llvm/llvm-project/pull/143914
Should fix https://github.com/llvm/llvm-project/issues/116116
>From 3e070f4aa1e105a4f5b486b662e481195a0a4608 Mon Sep 17 00:00:00 2001
From: Tom Vijlbrief
Date: Thu, 12 Jun 2025 16:59:46 +0200
Subject: [PATCH] Ad
80 matches
Mail list logo
