@@ -743,9 +743,11 @@ void Linux::AddHIPRuntimeLibArgs(const ArgList &Args,
Args.MakeArgString(StringRef("-L") + RocmInstallation->getLibPath()));
if (Args.hasFlag(options::OPT_frtlib_add_rpath,
- options::OPT_fno_rtlib_add_rpath, false))
-CmdArgs.
https://github.com/yxsamliu approved this pull request.
https://github.com/llvm/llvm-project/pull/143792
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@@ -743,9 +743,12 @@ void Linux::AddHIPRuntimeLibArgs(const ArgList &Args,
Args.MakeArgString(StringRef("-L") + RocmInstallation->getLibPath()));
if (Args.hasFlag(options::OPT_frtlib_add_rpath,
- options::OPT_fno_rtlib_add_rpath, false))
+
https://github.com/yxsamliu approved this pull request.
LGTM. Thanks
https://github.com/llvm/llvm-project/pull/134016
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Author: Yaxun (Sam) Liu
Date: 2025-06-12T21:41:41-04:00
New Revision: 7232c07eb97d5c21d47a661c9cca8981c7f91698
URL:
https://github.com/llvm/llvm-project/commit/7232c07eb97d5c21d47a661c9cca8981c7f91698
DIFF:
https://github.com/llvm/llvm-project/commit/7232c07eb97d5c21d47a661c9cca8981c7f91698.dif
Author: Yaxun (Sam) Liu
Date: 2025-06-12T21:33:05-04:00
New Revision: 8890706db67384a423773cc921302dd63d950ef5
URL:
https://github.com/llvm/llvm-project/commit/8890706db67384a423773cc921302dd63d950ef5
DIFF:
https://github.com/llvm/llvm-project/commit/8890706db67384a423773cc921302dd63d950ef5.dif
https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/143964
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https://github.com/llvm/llvm-project/pull/143964
>From ff3a9dd0765e499573d8d0049aca1d4568ac586f Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Wed, 11 Jun 2025 14:02:59 -0400
Subject: [PATCH 1/3] Revert "Revert "[HIP] use offload wrapper for
non-devi
@@ -9249,8 +9249,20 @@ void LinkerWrapper::ConstructJob(Compilation &C, const
JobAction &JA,
// Add the linker arguments to be forwarded by the wrapper.
CmdArgs.push_back(Args.MakeArgString(Twine("--linker-path=") +
LinkCommand->getEx
https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/143964
>From 5f3cc287ff2c3c84ba840ebaa0931773341a02b2 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Wed, 11 Jun 2025 14:02:59 -0400
Subject: [PATCH 1/3] Revert "Revert "[HIP] use offload wrapper for
non-devi
https://github.com/yxsamliu approved this pull request.
https://github.com/llvm/llvm-project/pull/143949
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@@ -310,8 +310,8 @@ Error relocateOffloadSection(const ArgList &Args, StringRef
Output) {
// Remove the old .llvm.offloading section to prevent further linking.
ObjcopyArgs.emplace_back("--remove-section");
ObjcopyArgs.emplace_back(".llvm.offloading");
- for (StringRef
yxsamliu wrote:
I split it into 3 commits for ease of reviewing: the original change and the
two fixes.
https://github.com/llvm/llvm-project/pull/143964
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https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/143964
Fixed two issues:
1. assertion with -flto. the linker wrapper action is missing for wrapping the
device binary. Added it for -flto.
2. when there are two HIP files, the kernels in the second file were not fo
https://github.com/yxsamliu approved this pull request.
thanks. I will take a look
https://github.com/llvm/llvm-project/pull/143432
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https://github.com/yxsamliu approved this pull request.
LGTM. Thanks
https://github.com/llvm/llvm-project/pull/142857
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https://github.com/llvm/llvm-project/pull/141633
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https://github.com/llvm/llvm-project/pull/141633
>From e8692fee660df71b8a7f277d1c85b925a2d678f1 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Tue, 27 May 2025 13:03:32 -0400
Subject: [PATCH] [AMDGPU] fix amdgpu_max_num_work_groups in templates
Clang
https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/141581
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https://github.com/llvm/llvm-project/pull/141633
Clang does not instantiate amdgpu_max_num_work_groups attribute with one
template argument, causing
assertion codegen.
Fixes: https://github.com/llvm/llvm-project/issues/139570
>From f4849e095e750195d072484cb
https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/141581
Global variable `__hip_cuid_*` is for identifying purpose and does not need
sanitization, therefore disable it for sanitizers.
>From 503ee3dd5144b4cc2dd83488b2194900605217fd Mon Sep 17 00:00:00 2001
From: "Yax
yxsamliu wrote:
> > > I am not ok with this being an error by default.
> >
> >
> > I think compilation must fail when an unsupported and untested option is
> > specified. And that includes when the target is SPIR-V.
>
> I would call it a supported and used option. The unsupported and untested
yxsamliu wrote:
> > > I don't think we should be introducing an additional option that behaves
> > > identically to another option just differing by a warning. This also
> > > isn't really a problem with the language, but the library support. The
> > > actual codegen should work just fine. Is
yxsamliu wrote:
> I don't think we should be introducing an additional option that behaves
> identically to another option just differing by a warning. This also isn't
> really a problem with the language, but the library support. The actual
> codegen should work just fine. Is there some other
@@ -585,6 +597,23 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
llvm::Value *Env = EmitScalarExpr(E->getArg(0));
return Builder.CreateCall(F, {Env});
}
+ case AMDGPU::BI__builtin_amdgcn_processor_is: {
+assert(CGM.getTriple().isSPIRV() &&
yxsamliu wrote:
> Being able to override a flag is a good thing to have, IMO. There are builds
> where the owner of the leaf targets do not have much control over which
> options are set by the "default" compilation, so they need to rely on being
> able to override preceding options.
>
> The
yxsamliu wrote:
> I thought we already added a generic -stdinc/nostdinc for this
there is only -nostdinc but there is no -stdinc
https://github.com/llvm/llvm-project/pull/140106
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https://github.com/llvm/llvm-project/pull/140185
wavefront size 64 is not fully supported for HIP on gfx10+ and it is not
tested. As such, currently HIP header contains an pragma error to diagnose such
use case by detecting predefined macro `__AMDGCN_WAVEFRO
yxsamliu wrote:
> > but there is other comgr user expecting comgr to have -nogpuinc by default.
> > changing that will cause regressions.
>
> If `comgr` can have custom flags then you could just pass the 'do not pass
> `-nogpuinc` by default' flag presumably.
As I said, I think this is just o
yxsamliu wrote:
> > > Hmm, in what cases is `-nogpuinc` added when we don't actually want it? I
> > > think we should avoid adding `-nogpuinc` if it's not needed, if possible.
> >
> >
> > comgr is the JIT compiler for HIP on ROCm. comgr uses -nogpuinc by default.
> > However, some users of co
yxsamliu wrote:
> > comgr is the JIT compiler for HIP on ROCm. comgr uses -nogpuinc by default.
> > However, some users of comgr need to override that so that comgr enables
> > the wrapper headers. We cannot simply let comgr stop using -nogpuinc by
> > default since it will break existing comg
yxsamliu wrote:
> > > > > Hmm, in what cases is `-nogpuinc` added when we don't actually want
> > > > > it? I think we should avoid adding `-nogpuinc` if it's not needed, if
> > > > > possible.
> > > >
> > > >
> > > > comgr is the JIT compiler for HIP on ROCm. comgr uses -nogpuinc by
> > > >
yxsamliu wrote:
> Hmm, in what cases is `-nogpuinc` added when we don't actually want it? I
> think we should avoid adding `-nogpuinc` if it's not needed, if possible.
comgr is the JIT compiler for HIP on ROCm. comgr uses -nogpuinc by default.
However, some users of comgr need to override that
https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/140106
Currently there is only option -nogpuinc for disabling the default CUDA/HIP
wrapper headers. However, there are situations where -nogpuinc needs to be
overriden for enabling CUDA/HIP wrapper headers. This patc
https://github.com/yxsamliu approved this pull request.
LGTM. Thanks
https://github.com/llvm/llvm-project/pull/139697
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https://github.com/llvm/llvm-project/pull/139892
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yxsamliu wrote:
> I think that in general we also need to decide on what happens when you pick
> an amdgcn— triple. IMHO for that case we should probably error out if no mcpu
> is provided, since there’s no reasonable default, except for “all”, but that
> would be incredibly disruptive.
That
yxsamliu wrote:
So we will wait until amdgcnspirv uses SPRIV backend by default, then switch
HIP default offload arch to amdgcnspirv. That sounds a reasonable solution to
me.
https://github.com/llvm/llvm-project/pull/139281
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yxsamliu wrote:
The main obstacle of letting clang emit error when `--offload-arch` is not
specified is HIP apps using hipcc as CMAKE_CXX_COMPILER. hipcc adds -xhip by
default for .cpp programs. This is a known and long existing issue.
Another option is to have multiple `--offload-arch` option
yxsamliu wrote:
I don't think this PR should be merged. Since John is the code owner of clang
codegen.
https://github.com/llvm/llvm-project/pull/138866
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https://github.com/llvm/llvm-project/pull/139112
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https://github.com/llvm/llvm-project/pull/139112
>From 7606c3bca9ba1de181d16038218963e822bb90e3 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Thu, 8 May 2025 12:40:23 -0400
Subject: [PATCH] [HIP] fix bundle ID for amdgcnspirv
Currently ROCm 6.4.0 on
https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/139112
Currently ROCm 6.4.0 only recognize spirv64-amd-amdhsa- in bundle ID.
spirv64-amd-amdhsa-unknown causes all HIP apps compiled for amdgcnspirv to fail.
Previously we fixed a similar issue for
amdgcn-amd-amdhsa-
https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/138162
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https://github.com/yxsamliu approved this pull request.
https://github.com/llvm/llvm-project/pull/138555
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https://github.com/llvm/llvm-project/pull/138162
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https://github.com/llvm/llvm-project/pull/138162
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https://github.com/llvm/llvm-project/pull/138162
Rate limit · GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,sans-
@@ -0,0 +1,23 @@
+// expected-no-diagnostics
+
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -aux-triple
amdgcn-amd-amdhsa -fsyntax-only -verify -xhip %s
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fsyntax-only -fcuda-is-device
-verify -xhip %s
+
+#include "Inputs/cuda
https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/138162
>From 7b139b3a06e45f7429e1e0f15eb16d0c3aed5718 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Thu, 1 May 2025 12:08:05 -0400
Subject: [PATCH] [CUDA][HIP] Fix implicit attribute of builtin
When a builti
https://github.com/yxsamliu edited
https://github.com/llvm/llvm-project/pull/138162
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https://github.com/llvm/llvm-project/pull/138162
When a builtin function with generic pointer parameter is passed a pointer with
address space, clang creates an overloaded builtin function but does not make
it implicit. This causes error when the builtin is
https://github.com/yxsamliu approved this pull request.
https://github.com/llvm/llvm-project/pull/137769
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yxsamliu wrote:
> > In practice this should be a single use of an internal function and should
> > not require this hint. Is this papering over a different issue?
>
> Why do you think it is an internal function? I thought it's an externally
> callable stub.
Agree. OpenCL allows calling an ext
yxsamliu wrote:
can we add a llvm-test-suite test for these builtin functions? we can compare
their value with host results for typical and corner inputs, like the test
added in this PR https://github.com/llvm/llvm-test-suite/pull/230 . This will
give us some confidence that the clang codegen
https://github.com/yxsamliu approved this pull request.
https://github.com/llvm/llvm-project/pull/136413
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https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/136645
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https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/136645
>From 834f1eed2ffde0b15209fca6560191911151c9f6 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Wed, 16 Apr 2025 11:09:16 -0400
Subject: [PATCH] [CUDA][HIP] capture possible ODR-used var
In a lambda func
@@ -1100,3 +1101,49 @@ std::string SemaCUDA::getConfigureFuncName() const {
// Legacy CUDA kernel configuration call
return "cudaConfigureCall";
}
+
+// Record any local constexpr variables that are passed one way on the host
+// and another on the device.
+void SemaCUDA::r
@@ -14706,6 +14706,8 @@ ExprResult Sema::BuildOverloadedCallExpr(Scope *S, Expr
*Fn,
// the UnresolvedLookupExpr was type-dependent.
if (OverloadResult == OR_Success) {
const FunctionDecl *FDecl = Best->Function;
+if (LangOpts.CUDA)
yxsamliu wrote:
https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/136645
In a lambda function, a call of a function may
resolve to host and device functions with different
signatures. Especially, a constexpr local variable may
be passed by value by the device function and
passed by r
https://github.com/yxsamliu approved this pull request.
https://github.com/llvm/llvm-project/pull/135979
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@@ -5522,6 +5522,11 @@ bool Sema::CheckCallingConvAttr(const ParsedAttr &Attrs,
CallingConv &CC,
A = HostTI->checkCallingConvention(CC);
if (A == TargetInfo::CCCR_OK && CheckDevice && DeviceTI)
A = DeviceTI->checkCallingConvention(CC);
+ } else if (LangOpts.SY
yxsamliu wrote:
LGTM. The addition of the device version of std::__glibcxx_assert_fail() seems
reasonable and straightforward.
WDYT @Artem-B
https://github.com/llvm/llvm-project/pull/136133
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ht
yxsamliu wrote:
> This patch is cruelly missing some tests. Is there a place for tests of this
> kind? I haven't found an obvious one for other headers.
You may consider adding a test here
https://github.com/llvm/llvm-test-suite/tree/main/External/HIP.
If possible, I would be happy to see std
https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/135229
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https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/135229
>From 5c2283b01ac6a58e41df4260aecc01bcf463a0a9 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Thu, 10 Apr 2025 14:14:47 -0400
Subject: [PATCH] [Clang] add option --offload-jobs=N
for specifying number
@@ -57,6 +57,7 @@
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/Process.h"
+#include "llvm/Support/ThreadPool.h"
yxsamliu wrote:
will remove
https://github.com/llvm/llvm-project/pull/135229
https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/135229
>From 6aae774e5729779b1e9fd8fee792c06cbc00f29a Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Thu, 10 Apr 2025 14:14:47 -0400
Subject: [PATCH] [Clang] add option --offload-jobs=N
for specifying number
https://github.com/yxsamliu edited
https://github.com/llvm/llvm-project/pull/135229
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@@ -1234,6 +1234,10 @@ def offload_compression_level_EQ : Joined<["--"],
"offload-compression-level=">,
Flags<[HelpHidden]>,
HelpText<"Compression level for offload device binaries (HIP only)">;
+def offload_jobs_EQ : Joined<["--"], "offload-jobs=">,
+ HelpText<"Specify
https://github.com/yxsamliu approved this pull request.
https://github.com/llvm/llvm-project/pull/135224
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@@ -9360,6 +9362,19 @@ void LinkerWrapper::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back(LinkArg);
addOffloadCompressArgs(Args, CmdArgs);
+
+ // Default to half of hardware threads if users do not specify it.
+ if (Arg *A = Args.getLastArg(opti
@@ -1233,6 +1233,10 @@ def offload_compression_level_EQ : Joined<["--"],
"offload-compression-level=">,
Flags<[HelpHidden]>,
HelpText<"Compression level for offload device binaries (HIP only)">;
+def offload_jobs_EQ : Joined<["--"], "offload-jobs=">,
+ HelpText<"Set the
https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/135229
>From 8d66eac07fa9b4d052b821f1f33783a3e5a1af34 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Thu, 10 Apr 2025 14:14:47 -0400
Subject: [PATCH] [Clang] add option --offload-jobs=N
for specifying number
@@ -1233,6 +1233,10 @@ def offload_compression_level_EQ : Joined<["--"],
"offload-compression-level=">,
Flags<[HelpHidden]>,
HelpText<"Compression level for offload device binaries (HIP only)">;
+def offload_jobs_EQ : Joined<["--"], "offload-jobs=">,
+ HelpText<"Set the
https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/135229
for specifying number of threads for clang-linker-wrapper. By default it uses
half of hardware threads.
>From aaa6b0b3fbcff1c2f6bc8983c7c0abee1e63eb6a Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Th
@@ -0,0 +1,78 @@
+//===- OffloadArch.cpp - list available GPUs *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
yxsamliu wrote:
LGTM. Pls address other comments
https://github.com/llvm/llvm-project/pull/135027
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@@ -43,6 +43,33 @@ using namespace clang;
using namespace CodeGen;
using namespace llvm;
+/// Some builtins do not have library implementation on some targets and
+/// are instead emitted as LLVM IRs by some target builtin emitters.
+/// FIXME: Remove this when library support
https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/132869
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yxsamliu wrote:
> @lalaniket8 @arsenm I don't have a strong opinion, but shouldn't this
> transformation be done during lowering to the target? Current version of the
> patch brings odd behavior for LLVM IR to SPIR-V lowering for OpenCL kernels.
> SPIR-V don't allow one EntryPoint to refer ano
yxsamliu wrote:
ping
https://github.com/llvm/llvm-project/pull/132869
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@@ -242,3 +242,9 @@
// NO-WARN-ATOMIC: clang{{.*}} "-triple" "amdgcn-amd-amdhsa" {{.*}}
"-Werror=atomic-alignment" {{.*}} "-Wno-error=atomic-alignment"
// NO-WARN-ATOMIC-NOT: clang{{.*}} "-triple" "x86_64-unknown-linux-gnu" {{.*}}
"-Werror=atomic-alignment"
// NO-WARN-ATOMIC-
https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/133456
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@@ -2312,6 +2312,17 @@ bool Type::isRealType() const {
return isBitIntType();
}
+bool Type::isFPAtomicCompatibleType() const {
yxsamliu wrote:
LGTM. It does not depend on other factors.
https://github.com/llvm/llvm-project/pull/129495
_
https://github.com/yxsamliu approved this pull request.
LGTM. Thanks
https://github.com/llvm/llvm-project/pull/115821
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@@ -4920,6 +4920,116 @@ If no address spaces names are provided, all address
spaces are fenced.
__builtin_amdgcn_fence(__ATOMIC_SEQ_CST, "workgroup", "local")
__builtin_amdgcn_fence(__ATOMIC_SEQ_CST, "workgroup", "local", "global")
+__builtin_amdgcn_processor_is and __bui
@@ -0,0 +1,64 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --check-globals all --version 5
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -target-cpu gfx900 -emit-llvm %s
-o - | FileCheck --check-prefix=AMDGCN-GFX900 %s
+// RUN: %cla
https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/133456
>From be4ea80f2431bff0c017df3aef9f260dddfa9ccc Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Fri, 28 Mar 2025 11:30:39 -0400
Subject: [PATCH] [HIP] Claim --offloading-compress for -M
Cmake automatical
@@ -585,6 +597,23 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
llvm::Value *Env = EmitScalarExpr(E->getArg(0));
return Builder.CreateCall(F, {Env});
}
+ case AMDGPU::BI__builtin_amdgcn_processor_is: {
+assert(CGM.getTriple().isSPIRV() &&
https://github.com/yxsamliu closed
https://github.com/llvm/llvm-project/pull/133590
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https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/133590
>From 3f533ad3a54b199e96a14e91f01b9714c30f52c2 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Sun, 25 Feb 2024 11:13:40 -0500
Subject: [PATCH] [HIP] fix host min/max in header
CUDA defines min/max func
yxsamliu wrote:
This is an effort to reland https://github.com/llvm/llvm-project/pull/82956
Since we kept encountering regressions, we plan to add the change conditionally
under a macro so that we can deliver the fix to intended users without causing
regressions. Then we will try making the ch
https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/133590
CUDA defines min/max functions for host in global namespace. HIP header needs
to define them too to be compatible. Currently only min/max(int, int) is
defined. This causes wrong result for arguments that are o
@@ -9332,11 +9332,22 @@ void LinkerWrapper::ConstructJob(Compilation &C, const
JobAction &JA,
// Add the linker arguments to be forwarded by the wrapper.
CmdArgs.push_back(Args.MakeArgString(Twine("--linker-path=") +
LinkCommand->getE
https://github.com/yxsamliu updated
https://github.com/llvm/llvm-project/pull/132869
>From 205999ed91d9ed65dcfb73377f853ae7e35a7bda Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Fri, 21 Mar 2025 14:16:44 -0400
Subject: [PATCH] [HIP] use offload wrapper for non-device-only non-rdc
Curr
@@ -1026,6 +1026,12 @@ void Clang::AddPreprocessingOptions(Compilation &C,
const JobAction &JA,
CmdArgs.push_back("-dependency-file");
CmdArgs.push_back(DepFile);
}
+// Cmake generates dependency files using all compilation options specified
+// by user
yxsamliu wrote:
> > > Why does this only cause warnings when it makes dependency files?
> >
> >
> > Because `--offloading-compress` is parsed by offload bundler and offload
> > wrapper actions when creating job actions. There is no action to parse them
> > in the compilation that only generat
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