@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
@@ -0,0 +1,83 @@
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc970\");}" > %t.c
+// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c |
FileCheck %s \
+// RUN: --check-prefix=CHECKBOOL
+
+// RUN: echo "int main() { return __builtin_cpu_is(\"ppc-cel
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
diggerlin wrote:
I think the function is too short, It not worth to hav
@@ -10347,6 +10347,8 @@ def err_x86_builtin_tile_arg_duplicate : Error<
def err_builtin_target_unsupported : Error<
"builtin is not supported on this target">;
+def err_builtin_aix_os_unsupported : Error<
+ "this builtin is available only in AIX 7.2 and later operating syst
@@ -16542,22 +16542,75 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+#include "llvm/TargetParser/PPCTargetParser.def"
+ auto GetOpRes = [&](Value *FieldValue, unsigned Mask, unsigned Op,
+
https://github.com/diggerlin updated
https://github.com/llvm/llvm-project/pull/80069
>From a82a60e3af041f50b833d241a284e09a883e849a Mon Sep 17 00:00:00 2001
From: zhijian
Date: Tue, 30 Jan 2024 15:13:39 -0500
Subject: [PATCH 1/2] support builtin_cpu_is() for aix
---
.../clang/Basic/Diagnostic
https://github.com/diggerlin updated
https://github.com/llvm/llvm-project/pull/80069
>From a82a60e3af041f50b833d241a284e09a883e849a Mon Sep 17 00:00:00 2001
From: zhijian
Date: Tue, 30 Jan 2024 15:13:39 -0500
Subject: [PATCH 1/3] support builtin_cpu_is() for aix
---
.../clang/Basic/Diagnostic
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@@ -172,6 +172,30 @@ bool PPCSubtarget::enableSubRegLiveness() const {
return UseSubRegLiveness;
}
+void PPCSubtarget::tocDataChecks(unsigned PointerSize,
+ const GlobalVariable *GV) const {
+ // TODO: These asserts should be updated as more
@@ -16542,12 +16542,64 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
Intrinsic::ID ID = Intrinsic::not_intrinsic;
+ // The lambda function converts builtin_cpu_is function into directly
+ // returning false or true, or it gets and checks the informati
@@ -126,4 +126,53 @@ PPC_LNX_CPU("power10",47)
#undef PPC_LNX_DEFINE_OFFSETS
#undef PPC_LNX_FEATURE
#undef PPC_LNX_CPU
+
+// Definition of the following values are found in the AIX header file:
.
+#ifndef AIX_POWERPC_SYS_CONF
+#define AIX_POWERPC_SYS_CONF
+ #define AIX_SYSCON
@@ -10347,6 +10347,8 @@ def err_x86_builtin_tile_arg_duplicate : Error<
def err_builtin_target_unsupported : Error<
"builtin is not supported on this target">;
+def err_builtin_aix_os_unsupported : Error<
+ "this builtin is available only on AIX 7.2 and later operating syst
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>From a82a60e3af041f50b833d241a284e09a883e849a Mon Sep 17 00:00:00 2001
From: zhijian
Date: Tue, 30 Jan 2024 15:13:39 -0500
Subject: [PATCH 1/4] support builtin_cpu_is() for aix
---
.../clang/Basic/Diagnostic
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>From a82a60e3af041f50b833d241a284e09a883e849a Mon Sep 17 00:00:00 2001
From: zhijian
Date: Tue, 30 Jan 2024 15:13:39 -0500
Subject: [PATCH 1/5] support builtin_cpu_is() for aix
---
.../clang/Basic/Diagnostic
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>From a82a60e3af041f50b833d241a284e09a883e849a Mon Sep 17 00:00:00 2001
From: zhijian
Date: Tue, 30 Jan 2024 15:13:39 -0500
Subject: [PATCH 1/6] support builtin_cpu_is() for aix
---
.../clang/Basic/Diagnostic
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>From 557e7163d744890aadfa703a81a0c4f2cd112517 Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/5] Implement a subset of builtin_cpu_supports() features
---
clang
https://github.com/diggerlin updated
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>From 557e7163d744890aadfa703a81a0c4f2cd112517 Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/6] Implement a subset of builtin_cpu_supports() features
---
clang
@@ -337,12 +347,58 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(uint64_t &TypeSize) const {
+ llvm::Type *ElemTy;
+ unsigned RegsNeeded; // Registers Needed f
@@ -420,6 +496,10 @@ ABIArgInfo PPC32_SVR4_ABIInfo::classifyReturnType(QualType
RetTy) const {
return ABIArgInfo::getDirect(CoerceTy);
}
}
+ if (IsComplexInRegABI && RetTy->isAnyComplexType()) {
+assert(RetTy->isAnyComplexType() && "RetTy must be Complex type.
@@ -330,22 +330,33 @@ namespace {
class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
bool IsSoftFloatABI;
bool IsRetSmallStructInRegABI;
+ bool IsComplexInRegABI;
diggerlin wrote:
do we need a new data member `IsComplexInRegABI` here ? (there are several
@@ -337,12 +347,58 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(uint64_t &TypeSize) const {
+ llvm::Type *ElemTy;
+ unsigned RegsNeeded; // Registers Needed f
@@ -396,12 +407,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(uint64_t &TypeSize) const {
+ llvm::Type *ElemTy;
+ unsigned RegsNeeded; // Registers Needed f
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>From a82a60e3af041f50b833d241a284e09a883e849a Mon Sep 17 00:00:00 2001
From: zhijian
Date: Tue, 30 Jan 2024 15:13:39 -0500
Subject: [PATCH 1/7] support builtin_cpu_is() for aix
---
.../clang/Basic/Diagnostic
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@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
---
@@ -184,11 +184,13 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
bool IsSoftFloat =
CodeGenOpts.FloatABI == "soft" || Target.hasFeature("spe");
-return createPPC32TargetCodeGenInfo(CGM, IsSoftFloat);
+unsigned RLen = Target.getPointerWidth(LangAS::Defaul
@@ -184,11 +184,13 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
bool IsSoftFloat =
CodeGenOpts.FloatABI == "soft" || Target.hasFeature("spe");
-return createPPC32TargetCodeGenInfo(CGM, IsSoftFloat);
+unsigned RLen = Target.getPointerWidth(LangAS::Defaul
@@ -271,22 +271,33 @@ namespace {
class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
bool IsSoftFloatABI;
bool IsRetSmallStructInRegABI;
+ bool isComplexInRegABI;
+ // Size of GPR in bits
+ unsigned RLen;
diggerlin wrote:
`RLen` is too short to understa
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@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
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@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
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The features which __builtin_cpu_support() supports are descripted in
https://gcc.gnu.org/onlinedocs/gcc-8.1.0/gcc/PowerPC-Built-in-Functions.html#:~:text=The%20__builtin_cpu_supports%20function%20requires,in%2
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>From cef79b36bcb3f4b7452d01aafdf111ff0e50605d Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/2] Implement a subset of builtin_cpu_supports() features
---
clang
https://github.com/diggerlin updated
https://github.com/llvm/llvm-project/pull/82809
>From cef79b36bcb3f4b7452d01aafdf111ff0e50605d Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/3] Implement a subset of builtin_cpu_supports() features
---
clang
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>From cef79b36bcb3f4b7452d01aafdf111ff0e50605d Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/4] Implement a subset of builtin_cpu_supports() features
---
clang
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@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
@@ -271,22 +271,33 @@ namespace {
class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
bool IsSoftFloatABI;
bool IsRetSmallStructInRegABI;
+ bool isComplexInRegABI;
+ // Size of GPR in bits
+ unsigned RLen;
+ static const int NumArgGPRs = 8;
CharUnits getParamTypeAli
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@@ -372,11 +453,12 @@ Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction
&CGF, Address VAList,
if (getTarget().getTriple().isOSDarwin()) {
auto TI = getContext().getTypeInfoInChars(Ty);
TI.Align = getParamTypeAlignment(Ty);
+int ArgGPRs = NumArgGPRs;
Ch
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@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
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@@ -78,6 +78,13 @@ class CodeGenOptions : public CodeGenOptionsBase {
SRCK_InRegs// Small structs in registers (-freg-struct-return).
};
+ enum ComplexArgumentConventionKind {
+CMPLX_Default,
+CMPLX_OnStack,
diggerlin wrote:
it looks you de
@@ -271,22 +271,33 @@ namespace {
class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
bool IsSoftFloatABI;
bool IsRetSmallStructInRegABI;
+ bool isComplexInRegABI;
+ // Size of GPR in bits
+ unsigned RLen;
+ static const int NumArgGPRs = 8;
CharUnits getParamTypeAli
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@@ -0,0 +1,132 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 2
+
+// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -target-cpu pwr8 \
+// RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK-DEF
+// RUN: %clang_
@@ -0,0 +1,132 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 2
+
+// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu -target-cpu pwr8 \
diggerlin wrote:
do you really need `-target-cpu pwr8` since the tes
@@ -337,12 +350,77 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(QualType Ty,
+ uint64_t &TypeSize) const {
+
+ asse
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>From cef79b36bcb3f4b7452d01aafdf111ff0e50605d Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/5] Implement a subset of builtin_cpu_supports() features
---
clang
@@ -16560,32 +16560,69 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
#include "llvm/TargetParser/PPCTargetParser.def"
auto GenAIXPPCBuiltinCpuExpr = [&](unsigned SupportMethod, unsigned FieldIdx,
- unsigned CompOp,
+
https://github.com/diggerlin updated
https://github.com/llvm/llvm-project/pull/82809
>From cef79b36bcb3f4b7452d01aafdf111ff0e50605d Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/6] Implement a subset of builtin_cpu_supports() features
---
clang
https://github.com/diggerlin updated
https://github.com/llvm/llvm-project/pull/82809
>From cef79b36bcb3f4b7452d01aafdf111ff0e50605d Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/7] Implement a subset of builtin_cpu_supports() features
---
clang
@@ -364,7 +364,14 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public
TargetInfo {
// have Glibc since it is Glibc that provides the HWCAP[2] in the auxv.
static constexpr int MINIMUM_AIX_OS_MAJOR = 7;
static constexpr int MINIMUM_AIX_OS_MINOR = 2;
- bool supportsCp
https://github.com/diggerlin updated
https://github.com/llvm/llvm-project/pull/82809
>From cef79b36bcb3f4b7452d01aafdf111ff0e50605d Mon Sep 17 00:00:00 2001
From: zhijian
Date: Fri, 23 Feb 2024 13:23:18 -0500
Subject: [PATCH 1/8] Implement a subset of builtin_cpu_supports() features
---
clang
https://github.com/diggerlin deleted
https://github.com/llvm/llvm-project/pull/77732
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@@ -337,12 +347,58 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(uint64_t &TypeSize) const {
+ llvm::Type *ElemTy;
+ unsigned RegsNeeded; // Registers Needed f
https://github.com/diggerlin edited
https://github.com/llvm/llvm-project/pull/77732
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@@ -337,12 +347,58 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(uint64_t &TypeSize) const {
+ llvm::Type *ElemTy;
+ unsigned RegsNeeded; // Registers Needed f
@@ -421,6 +503,11 @@ ABIArgInfo PPC32_SVR4_ABIInfo::classifyReturnType(QualType
RetTy) const {
}
}
+ bool IsComplexInRegABI =
+ getCodeGenOpts().getComplexInRegABI() == CodeGenOptions::CMPLX_InGPR;
+ if (IsComplexInRegABI && RetTy->isAnyComplexType())
---
@@ -0,0 +1,306 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 2
+
+// RUN: %clang_cc1 -triple powerpc-unknown-linux-gnu \
+// RUN: -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK-DEF
+// RUN: %clang_cc1 -triple power
@@ -396,12 +405,85 @@ CharUnits
PPC32_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(4);
}
+ABIArgInfo PPC32_SVR4_ABIInfo::handleComplex(uint64_t &TypeSize) const {
+ llvm::Type *ElemTy;
+ unsigned RegsNeeded; // Registers Needed f
https://github.com/diggerlin edited
https://github.com/llvm/llvm-project/pull/77732
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