sdesmalen added a comment.
Can you also split this patch in two:
- One for Clang where it will no longer use the legacy ld2/3/4 intrinsics
- One for LLVM where it removes the old intrinsics and AutoUpgrades the old
intrinsics.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
CarolineConcatto marked an inline comment as done.
CarolineConcatto added inline comments.
Comment at: llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll:127
; CHECK-NEXT:ptrue p0.d
-; CHECK-NEXT:st1d { z16.d }, p0, [sp]
-; CHECK-NEXT:st1d { z17.d }, p0, [sp,
sdesmalen added inline comments.
Comment at: llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll:127
; CHECK-NEXT:ptrue p0.d
-; CHECK-NEXT:st1d { z16.d }, p0, [sp]
-; CHECK-NEXT:st1d { z17.d }, p0, [sp, #1, mul vl]
-; CHECK-NEXT:st1d { z18.d }, p0, [sp, #2,
CarolineConcatto added inline comments.
Comment at: llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll:22
+; CHECK-NEXT:mov z4.d, z8.d
+; CHECK-NEXT:bl llvm.aarch64.vector.insert.nxv8f64.nx2f64
+; CHECK-NEXT:mov w0, #2
sdesmalen wrote:
> There
sdesmalen added inline comments.
Comment at: llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll:22
+; CHECK-NEXT:mov z4.d, z8.d
+; CHECK-NEXT:bl llvm.aarch64.vector.insert.nxv8f64.nx2f64
+; CHECK-NEXT:mov w0, #2
There is something going wrong h