[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

eklepilkina added a comment. @lewis-revill could you please provide the case where the LTO linker would not receive any information about target features? We met similar problems, it appears on runtime functions in our cases. I made a small fix for this problem https://reviews.llvm.org/D139704.

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

khchen added a comment. > Possible solution/results: > > 1. All functions in `a.o` and `b.o` using same target features during the > first build stage, `-march=rv64gc` for a.o, `-march=rv64g` for `b.o`, and > `-march` option given in LTO CodeGen stage is ignored, it only used for ELF > attribut

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

kito-cheng added a comment. > I'm not sure how the issues with datalayout in particular end up being an > issue in practice. > > clang shouldn't be writing out object files without a datalayout. > The code to infer alignment on load/store/etc. only exists for compatibility > with old bitcode/IR;

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

efriedma added a comment. In D132843#3771029 , @jrtc27 wrote: > In D132843#3770936 , @efriedma > wrote: > >>> There is also an issue with how to store and determine the final LTO target >>> features. For example

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

jrtc27 added a comment. In D132843#3770936 , @efriedma wrote: >> So we need to keep ABI in somewhere and read that at LTO phase, the most >> ideal place is the module flags. We already did that[6], but that comes with >> a problem is it's too late to up

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

efriedma added a comment. > So we need to keep ABI in somewhere and read that at LTO phase, the most > ideal place is the module flags. We already did that[6], but that comes with > a problem is it's too late to update datalayout when we start to read a > module, because LLVM will use datalayou

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

kito-cheng added a subscriber: khchen. kito-cheng added a comment. This is dump from my mailbox, few month ago I written a offlist mail to describe about RISC-V LTO status: --- LTO for RISC-V is really kind of a long long story. @khchen has been fighting for that for a long time, but he is no

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

efriedma added a comment. I'd prefer to use an approach with less moving parts: the bitcode should contain enough information to generate code without specifying anything on the command-line that wouldn't normally be passed to the linker. Among other issues, it's hard to understand the intende

[PATCH] D132843: [RISCV] Ensure target features get passed to the LTO linker for RISC-V

lewis-revill created this revision. lewis-revill added reviewers: efriedma, lenary, jrtc27, asb. Herald added subscribers: sunshaoce, VincentWu, luke957, ormris, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, simoncook, s.egerton, Jim, benna, psnobl, jocewei, PkmX, t