[PATCH] D146402: [clang-format] Handle Verilog assign statements

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf90668c8ccc5: [clang-format] Handle Verilog assign statements (authored by sstwcw). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D146402: [clang-format] Handle Verilog assign statements

sstwcw created this revision. sstwcw added reviewers: HazardyKnusperkeks, MyDeveloperDay, owenpan, rymiel. Herald added a project: All. sstwcw requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://re