This revision was automatically updated to reflect the committed changes.
Closed by commit rGf7848fd8f7b5: [AArch64][SVE] Implement additional
floating-point arithmetic intrinsics (authored by kmclaughlin).
Repository:
rG LLVM Github Monorepo
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sdesmalen accepted this revision.
sdesmalen added a comment.
This revision is now accepted and ready to land.
Thanks, LGTM!
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kmclaughlin updated this revision to Diff 229129.
kmclaughlin added a comment.
- Rebased & removed unused //llvm.aarch64.sve.fcmla.lane.nxv2f64// from
sve-intrinsics-fp-arith.ll
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kmclaughlin updated this revision to Diff 228660.
kmclaughlin added a comment.
- Changed target constant to MVT::i32 in complexrotateop & complexrotateopodd
definitions
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sdesmalen added inline comments.
Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:10064
+ SDNodeXFormgetTargetConstant((N->getSExtValue() / 90), SDLoc(N),
MVT::i64);
+}]>> {
should the target constant
kmclaughlin created this revision.
kmclaughlin added reviewers: sdesmalen, huntergr, dancgr.
Herald added subscribers: psnobl, rkruppe, hiraditya, kristof.beyls, tschuett.
Herald added a project: LLVM.
Adds intrinsics for the following:
- ftssel
- fcadd, fcmla
- fmla, fmls, fnmla, fnmls
- fmad,
