https://github.com/4vtomat updated
https://github.com/llvm/llvm-project/pull/83674
>From f14c54cb7c3c31e84a78ddf33b932c4c74e20365 Mon Sep 17 00:00:00 2001
From: Brandon Wu
Date: Fri, 1 Mar 2024 09:52:35 -0800
Subject: [PATCH 1/2] [clang][RISCV] Enable RVV with function attribute
__attribute__(
@@ -0,0 +1,41 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple riscv64 -S -verify %s
+
+// REQUIRES: riscv-registered-target
+#include
+
+void test_builtin() {
+ __riscv_vsetvl_e8m8(1); // expected-error {{'__builtin_r
https://github.com/BeMg edited https://github.com/llvm/llvm-project/pull/83674
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@@ -463,7 +463,8 @@ ParsedTargetAttr RISCVTargetInfo::parseTargetAttr(StringRef
Features) const {
Ret.Duplicate = "tune=";
Ret.Tune = AttrString;
-}
+} else if (Feature.starts_with("+"))
BeMg wrote:
This code section will make clang vio
4vtomat wrote:
Related request: https://github.com/riscv-non-isa/riscv-c-api-doc/issues/69
https://github.com/llvm/llvm-project/pull/83674
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llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
@llvm/pr-subscribers-clang
Author: Brandon Wu (4vtomat)
Changes
It is currently not possible to use "RVV type" and "RVV intrinsics" if
the "zve32x" is not enabled globally. However in some cases we may want
to use them only in some functio
https://github.com/4vtomat created
https://github.com/llvm/llvm-project/pull/83674
It is currently not possible to use "RVV type" and "RVV intrinsics" if
the "zve32x" is not enabled globally. However in some cases we may want
to use them only in some functions, for instance:
```
#include
__att
