llvmbot wrote:
/pull-request llvm/llvm-project#81593
https://github.com/llvm/llvm-project/pull/79276
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MDevereau wrote:
/cherry-pick d9c20e437fe110fb79b5ca73a52762e5b930b361
https://github.com/llvm/llvm-project/pull/79276
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https://github.com/MDevereau milestoned
https://github.com/llvm/llvm-project/pull/79276
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llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: Matthew Devereau (MDevereau)
Changes
This enables specifing "za" or "zt0" to the clobber list for inline asm. This
complies with the acle SME addition to the asm extension here:
https://github.com/ARM-software/acle/pull/276
---
https://github.com/MDevereau ready_for_review
https://github.com/llvm/llvm-project/pull/79276
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@@ -507,6 +507,10 @@ bool AArch64RegisterInfo::isAsmClobberable(const
MachineFunction ,
MCRegisterInfo::regsOverlap(PhysReg, AArch64::X16))
return true;
+ // ZA/ZT0 registers are reserved but may be permitted in the clobber list.
+ if (PhysReg.id() ==
@@ -10702,6 +10702,14 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
parseConstraintCode(Constraint) != AArch64CC::Invalid)
return std::make_pair(unsigned(AArch64::NZCV), ::CCRRegClass);
+ if (StringRef("{za}").equals_insensitive(Constraint)) {
+return
https://github.com/sdesmalen-arm edited
https://github.com/llvm/llvm-project/pull/79276
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https://github.com/sdesmalen-arm edited
https://github.com/llvm/llvm-project/pull/79276
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@@ -507,6 +507,10 @@ bool AArch64RegisterInfo::isAsmClobberable(const
MachineFunction ,
MCRegisterInfo::regsOverlap(PhysReg, AArch64::X16))
return true;
+ // ZA/ZT0 registers are reserved but may be permitted in the clobber list.
+ if (PhysReg.id() ==
@@ -10702,6 +10702,14 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
parseConstraintCode(Constraint) != AArch64CC::Invalid)
return std::make_pair(unsigned(AArch64::NZCV), ::CCRRegClass);
+ if (StringRef("{za}").equals_insensitive(Constraint)) {
https://github.com/MDevereau updated
https://github.com/llvm/llvm-project/pull/79276
>From e98987ebb48839ea652d63dfaa62ed841b426e46 Mon Sep 17 00:00:00 2001
From: Matt Devereau
Date: Thu, 18 Jan 2024 15:41:25 +
Subject: [PATCH 1/3] [AArch64][SME] Implement inline-asm clobbers for za/zt0
https://github.com/MDevereau updated
https://github.com/llvm/llvm-project/pull/79276
>From e98987ebb48839ea652d63dfaa62ed841b426e46 Mon Sep 17 00:00:00 2001
From: Matt Devereau
Date: Thu, 18 Jan 2024 15:41:25 +
Subject: [PATCH 1/2] [AArch64][SME] Implement inline-asm clobbers for za/zt0
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff cfddb59be2124f7ec615f48a2d0395c6fdb1bb56
e98987ebb48839ea652d63dfaa62ed841b426e46 --
https://github.com/MDevereau created
https://github.com/llvm/llvm-project/pull/79276
This enables specifing "za" or "zt0" to the clobber list for inline asm. This
complies with the acle SME addition to the asm extension here:
https://github.com/ARM-software/acle/pull/276
>From
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