https://github.com/momchil-velikov closed
https://github.com/llvm/llvm-project/pull/99041
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https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/99041
>From 0cca71a770750e34474d7734c8f803fb31feacee Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 15 Jul 2024 17:50:43 +0100
Subject: [PATCH 1/4] [AArch64] Implement NEON vamin/vamax intrinsics
Th
https://github.com/CarolineConcatto approved this pull request.
https://github.com/llvm/llvm-project/pull/99041
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@@ -2115,3 +2115,8 @@ let ArchGuard = "defined(__aarch64__)", TargetGuard =
"lut" in {
def VLUTI4_BF_X2_Q : SInst<"vluti4_laneq_x2", ".2(;
}
}
+
+let ArchGuard = "defined(__aarch64__)", TargetGuard = "faminmax" in {
momchil-velikov wrote:
Done
https:
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/99041
>From 886c48dd7efa227f8605bfafef4204cefbb75d6e Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 15 Jul 2024 17:50:43 +0100
Subject: [PATCH 1/4] [AArch64] Implement NEON vamin/vamax intrinsics
Th
@@ -2115,3 +2115,8 @@ let ArchGuard = "defined(__aarch64__)", TargetGuard =
"lut" in {
def VLUTI4_BF_X2_Q : SInst<"vluti4_laneq_x2", ".2(;
}
}
+
+let ArchGuard = "defined(__aarch64__)", TargetGuard = "faminmax" in {
SpencerAbson wrote:
Should this tar
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/99041
>From 886c48dd7efa227f8605bfafef4204cefbb75d6e Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 15 Jul 2024 17:50:43 +0100
Subject: [PATCH 1/3] [AArch64] Implement NEON vamin/vamax intrinsics
Th
momchil-velikov wrote:
Ping?
https://github.com/llvm/llvm-project/pull/99041
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https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/99041
>From 87f1a5aa2215a9fbc1bde7905b2fd5e8d5ff859a Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 15 Jul 2024 17:50:43 +0100
Subject: [PATCH 1/2] [AArch64] Implement NEON vamin/vamax intrinsics
Th
@@ -5985,6 +5985,26 @@ multiclass SIMDThreeSameVectorFP
opc,
[(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2f64 V128:$Rm)))]>;
}
+let mayRaiseFPException = 1, Uses = [FPCR] in
+multiclass SIMDThreeVectorFP opc,
momchil-velikov wrote:
Removed.
https://github.com/momchil-velikov updated
https://github.com/llvm/llvm-project/pull/99041
>From 8e0aba5bcfd0a5f861c9ebb30a28c05eb0d6dcf5 Mon Sep 17 00:00:00 2001
From: Momchil Velikov
Date: Mon, 15 Jul 2024 17:50:43 +0100
Subject: [PATCH 1/2] [AArch64] Implement NEON vamin/vamax intrinsics
Th
@@ -5985,6 +5985,26 @@ multiclass SIMDThreeSameVectorFP
opc,
[(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn), (v2f64 V128:$Rm)))]>;
}
+let mayRaiseFPException = 1, Uses = [FPCR] in
+multiclass SIMDThreeVectorFP opc,
CarolineConcatto wrote:
Why are y
momchil-velikov wrote:
> Did you consider emitting `llvm.fmin(llvm.fabs(x), llvm.fabs(y))`?
Nope. I'll have a look.
https://github.com/llvm/llvm-project/pull/99041
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https://github.com/davemgreen commented:
Did you consider emitting `llvm.fmin(llvm.fabs(x), llvm.fabs(y))`?
https://github.com/llvm/llvm-project/pull/99041
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