llvm-ci wrote:
LLVM Buildbot has detected a new failure on builder `mlir-nvidia-gcc7` running
on `mlir-nvidia` while building `clang,llvm` at step 5
"build-check-mlir-build-only".
Full details are available at:
https://lab.llvm.org/buildbot/#/builders/116/builds/676
Here is the relevant piec
https://github.com/CarolineConcatto closed
https://github.com/llvm/llvm-project/pull/88901
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https://github.com/CarolineConcatto updated
https://github.com/llvm/llvm-project/pull/88901
>From 4606329d0d1526cb19641b4762ca7805a9c854a2 Mon Sep 17 00:00:00 2001
From: Caroline Concatto
Date: Tue, 16 Apr 2024 08:50:29 +
Subject: [PATCH 1/3] Movaz
---
llvm/lib/Target/AArch64/AArch64SMEIn
aemerson wrote:
Reverse ping
https://github.com/llvm/llvm-project/pull/88901
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https://github.com/aemerson approved this pull request.
https://github.com/llvm/llvm-project/pull/88901
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aemerson wrote:
Same comment as
https://github.com/llvm/llvm-project/pull/88710#discussion_r1624880487
https://github.com/llvm/llvm-project/pull/88901
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llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: None (CarolineConcatto)
Changes
According to the specification in
ARM-software/acle#309 this adds the intrinsics
Move and zero multiple ZA single-vector groups to vector registers
// Variants are also available fo
https://github.com/CarolineConcatto created
https://github.com/llvm/llvm-project/pull/88901
According to the specification in
ARM-software/acle#309 this adds the intrinsics
Move and zero multiple ZA single-vector groups to vector registers
// Variants are also available for _za8
