https://github.com/androm3da closed
https://github.com/llvm/llvm-project/pull/85359
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https://github.com/MaskRay approved this pull request.
https://github.com/llvm/llvm-project/pull/85359
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@@ -0,0 +1,24 @@
+/// attribute parsing error cases.
+
+// RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>&1 \
+// RUN: | FileCheck %s
+
+ .attribute Tag_unknown_name, 0
+// CHECK: error: attribute name not recognized: Tag_unknown_name
quic-areg wrote:
@@ -251,7 +251,10 @@ StringRef llvm::object::getELFSectionTypeName(uint32_t
Machine, unsigned Type) {
}
break;
case ELF::EM_HEXAGON:
-switch (Type) { STRINGIFY_ENUM_CASE(ELF, SHT_HEX_ORDERED); }
+switch (Type) {
+ STRINGIFY_ENUM_CASE(ELF,
@@ -0,0 +1,20 @@
+/// Enabled by default for assembly
+// RUN: %clang -target hexagon-unknown-elf -### %s 2>&1 \
+// RUN:| FileCheck %s -check-prefix CHECK-ENABLED
+
+/// Can be forced on or off for assembly.
+// RUN: %clang -target hexagon-unknown-elf -### %s 2>&1
@@ -395,7 +396,8 @@ template class ELFObjectFile : public
ELFObjectFileBase {
for (const Elf_Shdr : *SectionsOrErr) {
if (Sec.sh_type == ELF::SHT_ARM_ATTRIBUTES ||
- Sec.sh_type == ELF::SHT_RISCV_ATTRIBUTES) {
+ Sec.sh_type ==
@@ -652,6 +660,57 @@ bool HexagonAsmParser::MatchAndEmitInstruction(SMLoc
IDLoc, unsigned ,
return finishBundle(IDLoc, Out);
return false;
}
+/// parseDirectiveAttribute
+/// ::= .attribute int, int
+/// ::= .attribute Tag_name, int
+bool
@@ -79,7 +80,8 @@ static cl::opt ErrorNoncontigiousRegister(
"merror-noncontigious-register",
cl::desc("Error for register names that aren't contigious"),
cl::init(false));
-
+static cl::opt AddBuildAttributes("hexagon-add-build-attributes",
+
@@ -0,0 +1,20 @@
+/// Enabled by default for assembly
+// RUN: %clang -target hexagon-unknown-elf -### %s 2>&1 \
quic-areg wrote:
Done
https://github.com/llvm/llvm-project/pull/85359
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https://github.com/quic-areg updated
https://github.com/llvm/llvm-project/pull/85359
>From 997c2741ce4ca85e5e23d7e73b6894fd07b79b8d Mon Sep 17 00:00:00 2001
From: quic-areg
Date: Thu, 14 Mar 2024 20:31:37 -0700
Subject: [PATCH 1/3] [Hexagon] ELF attributes for Hexagon
Defines a subset of
@@ -0,0 +1,24 @@
+/// attribute parsing error cases.
+
+// RUN: not llvm-mc -triple=hexagon -filetype=asm %s 2>&1 \
+// RUN: | FileCheck %s
+
+ .attribute Tag_unknown_name, 0
+// CHECK: error: attribute name not recognized: Tag_unknown_name
MaskRay wrote:
@@ -251,7 +251,10 @@ StringRef llvm::object::getELFSectionTypeName(uint32_t
Machine, unsigned Type) {
}
break;
case ELF::EM_HEXAGON:
-switch (Type) { STRINGIFY_ENUM_CASE(ELF, SHT_HEX_ORDERED); }
+switch (Type) {
+ STRINGIFY_ENUM_CASE(ELF,
@@ -395,7 +396,8 @@ template class ELFObjectFile : public
ELFObjectFileBase {
for (const Elf_Shdr : *SectionsOrErr) {
if (Sec.sh_type == ELF::SHT_ARM_ATTRIBUTES ||
- Sec.sh_type == ELF::SHT_RISCV_ATTRIBUTES) {
+ Sec.sh_type ==
@@ -652,6 +660,57 @@ bool HexagonAsmParser::MatchAndEmitInstruction(SMLoc
IDLoc, unsigned ,
return finishBundle(IDLoc, Out);
return false;
}
+/// parseDirectiveAttribute
+/// ::= .attribute int, int
+/// ::= .attribute Tag_name, int
+bool
@@ -0,0 +1,20 @@
+/// Enabled by default for assembly
+// RUN: %clang -target hexagon-unknown-elf -### %s 2>&1 \
+// RUN:| FileCheck %s -check-prefix CHECK-ENABLED
+
+/// Can be forced on or off for assembly.
+// RUN: %clang -target hexagon-unknown-elf -### %s 2>&1
@@ -79,7 +80,8 @@ static cl::opt ErrorNoncontigiousRegister(
"merror-noncontigious-register",
cl::desc("Error for register names that aren't contigious"),
cl::init(false));
-
+static cl::opt AddBuildAttributes("hexagon-add-build-attributes",
+
quic-areg wrote:
@MaskRay @androm3da @SundeepKushwaha @sgundapa @shankarke
https://github.com/llvm/llvm-project/pull/85359
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https://github.com/quic-areg updated
https://github.com/llvm/llvm-project/pull/85359
>From b035993b477160d9ac6ef01c8d27e6681682f251 Mon Sep 17 00:00:00 2001
From: quic-areg
Date: Thu, 14 Mar 2024 20:31:37 -0700
Subject: [PATCH 1/2] [Hexagon] ELF attributes for Hexagon
Defines a subset of
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff c3a1eb6207d85cb37ea29306481b40c9f6402309
b035993b477160d9ac6ef01c8d27e6681682f251 --
llvmbot wrote:
@llvm/pr-subscribers-objectyaml
@llvm/pr-subscribers-mc
@llvm/pr-subscribers-clang-driver
Author: None (quic-areg)
Changes
Defines a subset of attributes and emits them to a section called
.hexagon.attributes.
The current attributes recorded are the attributes needed by
https://github.com/quic-areg created
https://github.com/llvm/llvm-project/pull/85359
Defines a subset of attributes and emits them to a section called
.hexagon.attributes.
The current attributes recorded are the attributes needed by llvm-objdump to
automatically determine target features and
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