https://github.com/MaskRay closed
https://github.com/llvm/llvm-project/pull/91280
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https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
https://github.com/smithp35 approved this pull request.
LGTM from me too.
https://github.com/llvm/llvm-project/pull/91280
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https://github.com/jh7370 approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/91280
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MaskRay wrote:
> Just noting that I've taken another look through the whole thing and I have
> no new comments.
Thanks for the review! @dwblaikie @jh7370 @smithp35 If the current version
looks good to you, may I get explicit approval?
https://github.com/llvm/llvm-project/pull/91280
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
https://github.com/MaskRay edited
https://github.com/llvm/llvm-project/pull/91280
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@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
https://github.com/jh7370 commented:
Just noting that I've taken another look through the whole thing and I have no
new comments.
https://github.com/llvm/llvm-project/pull/91280
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@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
@@ -3908,7 +3933,8 @@ template void
GNUELFDumper::printRelocations() {
HasRelocSections = true;
std::string EntriesNum = "";
-if (Expected NumOrErr = GetEntriesNum(Sec))
+Expected NumOrErr = GetEntriesNum(Sec);
+if (NumOrErr)
MaskRay
@@ -3840,14 +3849,15 @@ void GNUELFDumper::printRelRelaReloc(const
Relocation ,
template
static void printRelocHeaderFields(formatted_raw_ostream , unsigned SType,
- const typename ELFT::Ehdr ) {
+ const
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
@@ -4888,6 +4920,34 @@ void ELFDumper::printRelocationsHelper(const
Elf_Shdr ) {
template void ELFDumper::printDynamicRelocationsHelper() {
const bool IsMips64EL = this->Obj.isMips64EL();
+ auto DumpCrelRegion = [&](DynRegionInfo ) {
MaskRay wrote:
It's
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
@@ -4888,6 +4920,34 @@ void ELFDumper::printRelocationsHelper(const
Elf_Shdr ) {
template void ELFDumper::printDynamicRelocationsHelper() {
const bool IsMips64EL = this->Obj.isMips64EL();
+ auto DumpCrelRegion = [&](DynRegionInfo ) {
+// While the size is unknown, a
@@ -4888,6 +4920,34 @@ void ELFDumper::printRelocationsHelper(const
Elf_Shdr ) {
template void ELFDumper::printDynamicRelocationsHelper() {
const bool IsMips64EL = this->Obj.isMips64EL();
+ auto DumpCrelRegion = [&](DynRegionInfo ) {
jh7370 wrote:
The
@@ -3840,14 +3849,15 @@ void GNUELFDumper::printRelRelaReloc(const
Relocation ,
template
static void printRelocHeaderFields(formatted_raw_ostream , unsigned SType,
- const typename ELFT::Ehdr ) {
+ const
@@ -3908,7 +3933,8 @@ template void
GNUELFDumper::printRelocations() {
HasRelocSections = true;
std::string EntriesNum = "";
-if (Expected NumOrErr = GetEntriesNum(Sec))
+Expected NumOrErr = GetEntriesNum(Sec);
+if (NumOrErr)
jh7370
@@ -392,6 +393,73 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+Expected
+ELFFile::getCrelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, isLE(), ELFT::Is64Bits ? 8 : 4);
jh7370 wrote:
Not quite what I
https://github.com/jh7370 edited https://github.com/llvm/llvm-project/pull/91280
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@@ -474,9 +480,29 @@ struct Elf_Rel_Impl, true>
: public Elf_Rel_Impl, false> {
LLVM_ELF_IMPORT_TYPES(Endianness, true)
static const bool IsRela = true;
+ static const bool IsCrel = false;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
@@ -392,6 +393,73 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+Expected
+ELFFile::getCrelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, isLE(), ELFT::Is64Bits ? 8 : 4);
+ Error Err = Error::success();
+ uint64_t Hdr
https://github.com/jh7370 commented:
I've spent as much time as I can on this today. I've reviewed the code in its
entirety, but still haven't tackled the tests, I'm afraid.
https://github.com/llvm/llvm-project/pull/91280
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jh7370 wrote:
> [jh7370](https://github.com/jh7370) sorry for pinging again. I will be highly
> grateful if you kindly review this pull request. This change will unblock
> some of our internal tasks and timely completion of this is crucial for us.
> Thank you in advance.
I hope to look at
DEBADRIBASAK wrote:
[jh7370](https://github.com/jh7370) sorry for pinging again. I will be highly
grateful if you kindly review this pull request. This change will unblock some
of our internal tasks and timely completion of this is crucial for us. Thank
you in advance.
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
jh7370 wrote:
> (Friendly Ping:)
Sorry, a combination of PTO and other factors have delayed me in getting to
this. It's on my radar, but will likely be a few more days before I can sink my
teeth into more complex reviews like this.
https://github.com/llvm/llvm-project/pull/91280
MaskRay wrote:
(Friendly Ping:)
https://github.com/llvm/llvm-project/pull/91280
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@@ -259,7 +260,7 @@ class ELFObjectWriter : public MCObjectWriter {
void recordRelocation(MCAssembler , const MCAsmLayout ,
const MCFragment *Fragment, const MCFixup ,
MCValue Target, uint64_t ) override;
- bool usesRela(const
@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream ) {
+ uint OffsetMask = 8, Offset = 0, Addend = 0;
+ uint32_t Symidx
@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream ) {
MaskRay wrote:
done
@@ -474,9 +480,28 @@ struct Elf_Rel_Impl, true>
: public Elf_Rel_Impl, false> {
LLVM_ELF_IMPORT_TYPES(Endianness, true)
static const bool IsRela = true;
+ static const bool IsCrel = false;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
@@ -474,9 +480,28 @@ struct Elf_Rel_Impl, true>
: public Elf_Rel_Impl, false> {
LLVM_ELF_IMPORT_TYPES(Endianness, true)
static const bool IsRela = true;
+ static const bool IsCrel = false;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
MaskRay wrote:
done
@@ -321,6 +321,11 @@ class ELFFile {
std::vector decode_relrs(Elf_Relr_Range relrs) const;
+ uint64_t crelHeader(ArrayRef Content) const;
MaskRay wrote:
renamed to `getCrelHeader`
https://github.com/llvm/llvm-project/pull/91280
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
+ DataExtractor::Cursor Cur(0);
+ uint64_t
https://github.com/MaskRay commented:
Thanks for the comments. Addressed
https://github.com/llvm/llvm-project/pull/91280
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https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
@@ -61,6 +61,9 @@ class MCTargetOptions {
bool Dwarf64 : 1;
+ // Use CREL relocation format for ELF.
+ bool Crel = false;
MaskRay wrote:
If LLVM adopts https://llvm.org/docs/Proposals/VariableNames.html , I'd like to
use `crel` instead of `cRel`. But
@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream ) {
jh7370 wrote:
Nit: `os` -> `OS`
@@ -259,7 +260,7 @@ class ELFObjectWriter : public MCObjectWriter {
void recordRelocation(MCAssembler , const MCAsmLayout ,
const MCFragment *Fragment, const MCFixup ,
MCValue Target, uint64_t ) override;
- bool usesRela(const
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
jh7370 wrote:
Endian/class
@@ -474,9 +480,28 @@ struct Elf_Rel_Impl, true>
: public Elf_Rel_Impl, false> {
LLVM_ELF_IMPORT_TYPES(Endianness, true)
static const bool IsRela = true;
+ static const bool IsCrel = false;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
+ DataExtractor::Cursor Cur(0);
+ uint64_t
@@ -392,6 +393,70 @@ ELFFile::decode_relrs(Elf_Relr_Range relrs) const {
return Relocs;
}
+template
+uint64_t ELFFile::crelHeader(ArrayRef Content) const {
+ DataExtractor Data(Content, true, 8); // endian/class is irrelevant
+ DataExtractor::Cursor Cur(0);
+ uint64_t
@@ -61,6 +61,9 @@ class MCTargetOptions {
bool Dwarf64 : 1;
+ // Use CREL relocation format for ELF.
+ bool Crel = false;
jh7370 wrote:
Nit here and elsewhere: Is "Crel" a correct way of spelling this? Should it be
"CRel" (for "CompressedRelocations")?
@@ -474,9 +480,28 @@ struct Elf_Rel_Impl, true>
: public Elf_Rel_Impl, false> {
LLVM_ELF_IMPORT_TYPES(Endianness, true)
static const bool IsRela = true;
+ static const bool IsCrel = false;
Elf_Sxword r_addend; // Compute value for relocatable field by adding this.
@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream ) {
+ uint OffsetMask = 8, Offset = 0, Addend = 0;
+ uint32_t Symidx
https://github.com/jh7370 commented:
I've made a start on this, but have run out of time. Will come back to
reviewing it another day.
https://github.com/llvm/llvm-project/pull/91280
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@@ -321,6 +321,11 @@ class ELFFile {
std::vector decode_relrs(Elf_Relr_Range relrs) const;
+ uint64_t crelHeader(ArrayRef Content) const;
jh7370 wrote:
It's not clear without looking at the method definition what the return value
actually represents.
https://github.com/jh7370 edited https://github.com/llvm/llvm-project/pull/91280
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jh7370 wrote:
Just noting that this is on my radar, but I haven't found time to look at it
properly yet.
https://github.com/llvm/llvm-project/pull/91280
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@@ -0,0 +1,100 @@
+# RUN: llvm-mc -filetype=obj -crel -triple=x86_64 %s -o %t.o
+# RUN: llvm-readelf -Sr -x .crelrodata2 -x .crelrodata16 %t.o | FileCheck %s
+
+# RUN: %if aarch64-registered-target %{ llvm-mc -filetype=obj -crel
-triple=aarch64_be %s -o %t.be.o %}
+# RUN: %if
@@ -1278,29 +1285,69 @@ void ELFState::writeSectionContent(
if (!Section.Relocations)
return;
+ const bool IsCrel = Section.Type == llvm::ELF::SHT_CREL;
const bool IsRela = Section.Type == llvm::ELF::SHT_RELA;
+ typename ELFT::uint OffsetMask = 8, Offset = 0,
@@ -3840,14 +3849,15 @@ void GNUELFDumper::printRelRelaReloc(const
Relocation ,
template
static void printRelocHeaderFields(formatted_raw_ostream , unsigned SType,
- const typename ELFT::Ehdr ) {
+ const
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
@@ -32,12 +32,17 @@ FileHeader:
# RUN: --match-full-lines --check-prefixes=GNU-RELOCS,GNU-PLTRELA
# LLVM-RELOCS: Dynamic Relocations {
+# LLVM-RELOCS-NEXT: 0x8 R_X86_64_64 foo 0x0
# LLVM-RELOCS-NEXT: 0x1 R_X86_64_NONE foo 0x0
# LLVM-RELOCS-NEXT: 0x2
@@ -123,6 +123,12 @@ class ContiguousBlobAccumulator {
return encodeULEB128(Val, OS);
}
+ unsigned writeSLEB128(int64_t Val) {
+if (!checkLimit(10))
MaskRay wrote:
Yes, LEB128 representing 64-bit integer needs at most 10 bytes.
I added a change
@@ -0,0 +1,18 @@
+# REQUIRES: powerpc-registered-target
+## Test CREL for a 32-bit big-endian target.
MaskRay wrote:
Thanks for the suggestion. Changed ppc to arm.
For static relocations, the RELA form is exclusively used as recommended
toolchain practice.
@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream ) {
+ uint OffsetMask = 8, Offset = 0, Addend = 0;
+ uint32_t Symidx
@@ -1278,29 +1285,69 @@ void ELFState::writeSectionContent(
if (!Section.Relocations)
return;
+ const bool IsCrel = Section.Type == llvm::ELF::SHT_CREL;
const bool IsRela = Section.Type == llvm::ELF::SHT_RELA;
+ typename ELFT::uint OffsetMask = 8, Offset = 0,
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
@@ -123,6 +123,12 @@ class ContiguousBlobAccumulator {
return encodeULEB128(Val, OS);
}
+ unsigned writeSLEB128(int64_t Val) {
+if (!checkLimit(10))
smithp35 wrote:
I'm guessing 10 is from 64-bits extended to 10 groups of 7-bits extended to 8.
@@ -0,0 +1,180 @@
+# RUN: yaml2obj --docnum=1 %s -o %t
+# RUN: llvm-readobj -r %t | FileCheck %s --check-prefix=LLVM --match-full-lines
+# RUN: llvm-readelf -r %t | FileCheck %s --check-prefix=GNU --match-full-lines
+
+# LLVM: Relocations [
+# LLVM-NEXT: Section ([[#]])
@@ -3840,14 +3849,15 @@ void GNUELFDumper::printRelRelaReloc(const
Relocation ,
template
static void printRelocHeaderFields(formatted_raw_ostream , unsigned SType,
- const typename ELFT::Ehdr ) {
+ const
@@ -0,0 +1,18 @@
+# REQUIRES: powerpc-registered-target
+## Test CREL for a 32-bit big-endian target.
smithp35 wrote:
AIUI from
https://example61560.wordpress.com/wp-content/uploads/2016/11/powerpc_abi.pdf
Power PC uses RELA relocations. Would it be worth
@@ -1278,29 +1285,69 @@ void ELFState::writeSectionContent(
if (!Section.Relocations)
return;
+ const bool IsCrel = Section.Type == llvm::ELF::SHT_CREL;
const bool IsRela = Section.Type == llvm::ELF::SHT_RELA;
+ typename ELFT::uint OffsetMask = 8, Offset = 0,
@@ -86,6 +86,8 @@ DYNAMIC_TAG(RELRSZ, 35) // Size of Relr relocation table.
DYNAMIC_TAG(RELR, 36)// Address of relocation table (Relr entries).
DYNAMIC_TAG(RELRENT, 37) // Size of a Relr relocation entry.
+DYNAMIC_TAG(CREL, 38) // CREL relocation table
+
@@ -32,12 +32,17 @@ FileHeader:
# RUN: --match-full-lines --check-prefixes=GNU-RELOCS,GNU-PLTRELA
# LLVM-RELOCS: Dynamic Relocations {
+# LLVM-RELOCS-NEXT: 0x8 R_X86_64_64 foo 0x0
# LLVM-RELOCS-NEXT: 0x1 R_X86_64_NONE foo 0x0
# LLVM-RELOCS-NEXT: 0x2
@@ -1278,29 +1285,69 @@ void ELFState::writeSectionContent(
if (!Section.Relocations)
return;
+ const bool IsCrel = Section.Type == llvm::ELF::SHT_CREL;
const bool IsRela = Section.Type == llvm::ELF::SHT_RELA;
+ typename ELFT::uint OffsetMask = 8, Offset = 0,
@@ -0,0 +1,100 @@
+# RUN: llvm-mc -filetype=obj -crel -triple=x86_64 %s -o %t.o
+# RUN: llvm-readelf -Sr -x .crelrodata2 -x .crelrodata16 %t.o | FileCheck %s
+
+# RUN: %if aarch64-registered-target %{ llvm-mc -filetype=obj -crel
-triple=aarch64_be %s -o %t.be.o %}
+# RUN: %if
@@ -934,10 +943,51 @@ void ELFWriter::WriteSecHdrEntry(uint32_t Name, uint32_t
Type, uint64_t Flags,
WriteWord(EntrySize); // sh_entsize
}
+template
+static void encodeCrel(ArrayRef Relocs, raw_ostream ) {
+ uint OffsetMask = 8, Offset = 0, Addend = 0;
+ uint32_t Symidx
https://github.com/smithp35 edited
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https://github.com/smithp35 commented:
I've finished going through the patches now. Apologies for the delay.
I don't think I have too many substantive comments. Overall this looks like it
implements the specification as described in the confluence page.
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
@@ -1142,6 +1193,13 @@ ELFObjectFile::getRela(DataRefImpl Rela) const {
return *Ret;
}
+template
MaskRay wrote:
Changes to this file are for llvm-objdump support. The use patterns ensure that
`Crels` will be populated.
I've added the assert to
@@ -292,6 +293,9 @@ template class ELFObjectFile : public
ELFObjectFileBase {
const Elf_Shdr *DotSymtabSec = nullptr; // Symbol table section.
const Elf_Shdr *DotSymtabShndxSec = nullptr; // SHT_SYMTAB_SHNDX section.
+ // Hold CREL relocations for
@@ -446,6 +450,7 @@ template class ELFObjectFile : public
ELFObjectFileBase {
const Elf_Rel *getRel(DataRefImpl Rel) const;
const Elf_Rela *getRela(DataRefImpl Rela) const;
+ Elf_Crel getCrel(DataRefImpl Rel) const;
MaskRay wrote:
renamed
@@ -321,6 +321,11 @@ class ELFFile {
std::vector decode_relrs(Elf_Relr_Range relrs) const;
+ uint64_t crelHeader(ArrayRef Content) const;
+ using RelsOrRelas = std::pair, std::vector>;
MaskRay wrote:
Yes, `std::pair<` instead of an exclusive or is for
@@ -1117,9 +1166,11 @@ void ELFObjectFile::getRelocationTypeName(
template
Expected
ELFObjectFile::getRelocationAddend(DataRefImpl Rel) const {
- if (getRelSection(Rel)->sh_type != ELF::SHT_RELA)
-return createError("Section is not SHT_RELA");
- return
MaskRay wrote:
> I think it would be useful to nominate a source as the canonical reference
> for the specification which is updated along with any implementation changes.
> I think
>
dwblaikie wrote:
> Switched to 0x4014 (generic range) to retain linker errors while making
> the experimental status stand out. Add a comment to make the intention
> clearer.
Seems a bit weird/problematic, using something in the reserved range/not in a
user extension space, but I guess
@@ -1022,6 +1027,40 @@ ELFObjectFile::section_rel_begin(DataRefImpl Sec)
const {
uintptr_t SHT = reinterpret_cast((*SectionsOrErr).begin());
RelData.d.a = (Sec.p - SHT) / EF.getHeader().e_shentsize;
RelData.d.b = 0;
+ if (reinterpret_cast(Sec.p)->sh_type ==
@@ -1142,6 +1193,13 @@ ELFObjectFile::getRela(DataRefImpl Rela) const {
return *Ret;
}
+template
smithp35 wrote:
Is there any way this can be called before Crels has been populated? If not
then please ignore the rest of the comment.
It looks like
@@ -446,6 +450,7 @@ template class ELFObjectFile : public
ELFObjectFileBase {
const Elf_Rel *getRel(DataRefImpl Rel) const;
const Elf_Rela *getRela(DataRefImpl Rela) const;
+ Elf_Crel getCrel(DataRefImpl Rel) const;
smithp35 wrote:
Perhaps use CRel as
@@ -292,6 +293,9 @@ template class ELFObjectFile : public
ELFObjectFileBase {
const Elf_Shdr *DotSymtabSec = nullptr; // Symbol table section.
const Elf_Shdr *DotSymtabShndxSec = nullptr; // SHT_SYMTAB_SHNDX section.
+ // Hold CREL relocations for
@@ -1117,9 +1166,11 @@ void ELFObjectFile::getRelocationTypeName(
template
Expected
ELFObjectFile::getRelocationAddend(DataRefImpl Rel) const {
- if (getRelSection(Rel)->sh_type != ELF::SHT_RELA)
-return createError("Section is not SHT_RELA");
- return
@@ -321,6 +321,11 @@ class ELFFile {
std::vector decode_relrs(Elf_Relr_Range relrs) const;
+ uint64_t crelHeader(ArrayRef Content) const;
+ using RelsOrRelas = std::pair, std::vector>;
smithp35 wrote:
There is an identically named type in LLD which has
https://github.com/smithp35 edited
https://github.com/llvm/llvm-project/pull/91280
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https://github.com/smithp35 commented:
Some initial comments based on a read of the ELFObjectFile. I haven't got as
far as the test and tools.
One general thought is whether it is worth adding in some more constants. For
example:
```
if (B & 1)
```
Could be something like:
```
if (B &
smithp35 wrote:
I think it would be useful to nominate a source as the canonical reference for
the specification which is updated along with any implementation changes. I
think
https://discourse.llvm.org/t/rfc-crel-a-compact-relocation-format-for-elf/77600/3
is a good starting point.
MaskRay wrote:
```
// TODO: Experimental CREL relocations. LLVM will change the value and
// break compatibility in the future.
SHT_CREL = 0x4014,
```
Switched to 0x4014 (generic range) to retain linker errors while making the
experimental status stand out. Add a comment to make
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 79921fbd5c6223ff7e6c75ed75974b4d16cad529
24c0fbb48e1cc7ffb9b3d321a11d399452e00341 --
https://github.com/MaskRay updated
https://github.com/llvm/llvm-project/pull/91280
>From a0cfafb82db825512b0ca44778fa9d4bb435563d Mon Sep 17 00:00:00 2001
From: Fangrui Song
Date: Mon, 6 May 2024 15:37:50 -0700
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
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